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authorAnson Huang <b20788@freescale.com>2011-05-16 11:51:31 +0800
committerXinyu Chen <xinyu.chen@freescale.com>2011-07-27 12:36:04 +0800
commit037233386984756cbcbd48c63dbae04f42af2b34 (patch)
tree0b7246dcd7f92a0a75ba370c2ffb922120b5e41e
parentbb4936e27c2a6f6d0f6f47a5173611b8b25e83e7 (diff)
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ENGR00143438 [MX50 RD3]DCDC_3V15 GPIO change
Change DCDC_3V15's GPIO setting for REV-D. Signed-off-by: Anson Huang <b20788@freescale.com>
-rw-r--r--board/freescale/mx50_rdp/mx50_rdp.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/board/freescale/mx50_rdp/mx50_rdp.c b/board/freescale/mx50_rdp/mx50_rdp.c
index 7687def..a56284f 100644
--- a/board/freescale/mx50_rdp/mx50_rdp.c
+++ b/board/freescale/mx50_rdp/mx50_rdp.c
@@ -655,10 +655,10 @@ static void setup_fec(void)
reg |= (1 << 15);
writel(reg, GPIO4_BASE_ADDR + 0x4);
- /* DCDC_PWREN(GP4_16) set to 0 to enable DCDC_3V15 */
+ /* DCDC_PWREN(GP4_16) set to 1 to enable DCDC_3V15 */
mxc_request_iomux(MX50_PIN_ECSPI2_SCLK, IOMUX_CONFIG_ALT1);
reg = readl(GPIO4_BASE_ADDR + 0x0);
- reg &= ~(1 << 16);
+ reg |= (1 << 16);
writel(reg, GPIO4_BASE_ADDR + 0x0);
reg = readl(GPIO4_BASE_ADDR + 0x4);