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authorAllen Martin <amartin@nvidia.com>2013-01-29 13:51:23 +0000
committerTom Warren <twarren@nvidia.com>2013-02-11 10:35:24 -0700
commitc98f03fae083fc741a296c07120407d306c2a8c6 (patch)
treeb59f833350aa0124f3fcdc0032ce4eae20d2106c
parentc35eb56a0e6f986cccd502625ed9c4b1cee23ffa (diff)
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tegra20: fdt: add SPI SFLASH node
Add node for tegra20 SPI SFLASH controller to fdt. Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
-rw-r--r--arch/arm/dts/tegra20.dtsi12
-rw-r--r--board/compulab/dts/tegra20-trimslice.dts5
2 files changed, 17 insertions, 0 deletions
diff --git a/arch/arm/dts/tegra20.dtsi b/arch/arm/dts/tegra20.dtsi
index 12049fd..9a89685 100644
--- a/arch/arm/dts/tegra20.dtsi
+++ b/arch/arm/dts/tegra20.dtsi
@@ -236,6 +236,18 @@
clocks = <&tegra_car 12>, <&tegra_car 124>;
};
+ spi@7000c380 {
+ compatible = "nvidia,tegra20-sflash";
+ reg = <0x7000c380 0x80>;
+ interrupts = <0 39 0x04>;
+ nvidia,dma-request-selector = <&apbdma 11>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ /* PERIPH_ID_SPI1, PLLP_OUT0 */
+ clocks = <&tegra_car 43>;
+ };
+
i2c@7000c400 {
#address-cells = <1>;
#size-cells = <0>;
diff --git a/board/compulab/dts/tegra20-trimslice.dts b/board/compulab/dts/tegra20-trimslice.dts
index c8a4dd4..7aeed67 100644
--- a/board/compulab/dts/tegra20-trimslice.dts
+++ b/board/compulab/dts/tegra20-trimslice.dts
@@ -23,6 +23,11 @@
status = "disabled";
};
+ spi@7000c380 {
+ status = "okay";
+ spi-max-frequency = <25000000>;
+ };
+
i2c@7000c400 {
status = "disabled";
};