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| author | Stephen Warren <swarren@nvidia.com> | 2014-01-24 12:46:06 -0700 |
|---|---|---|
| committer | Tom Warren <twarren@nvidia.com> | 2014-02-03 09:46:45 -0700 |
| commit | a73ca4789fddce35936dd8decb1522f08b6cb620 (patch) | |
| tree | 92ea9fea781dea5f747daedd0b9c68a4461f9b68 | |
| parent | b9dd6215ce280a460ff182f51e80b7f4bf8b019a (diff) | |
| download | u-boot-imx-a73ca4789fddce35936dd8decb1522f08b6cb620.zip u-boot-imx-a73ca4789fddce35936dd8decb1522f08b6cb620.tar.gz u-boot-imx-a73ca4789fddce35936dd8decb1522f08b6cb620.tar.bz2 | |
mmc: tegra: support Tegra124
Tegra124's MMC controller is very similar to earlier SoC generations,
and can be supported by the same driver.
However, there are some non-backwards-compatible HW differences, and
hence a new DT compatible value must be used to describe the HW. This
patch updates the driver to support that new compatible value.
That said, the HW differences are only relevant when enabling certain
high-performance transfer modes. Since the driver is currently very
simple and doesn't enable those modes, we don't actually need to address
any of these HW differences in the code yet, hence the simple nature of
this patch.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
Tested-by: Thierry Reding <treding@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
| -rw-r--r-- | drivers/mmc/tegra_mmc.c | 9 | ||||
| -rw-r--r-- | include/fdtdec.h | 1 | ||||
| -rw-r--r-- | lib/fdtdec.c | 1 |
3 files changed, 11 insertions, 0 deletions
diff --git a/drivers/mmc/tegra_mmc.c b/drivers/mmc/tegra_mmc.c index e1817e2..3d1ce12 100644 --- a/drivers/mmc/tegra_mmc.c +++ b/drivers/mmc/tegra_mmc.c @@ -668,6 +668,15 @@ void tegra_mmc_init(void) const void *blob = gd->fdt_blob; debug("%s entry\n", __func__); + /* See if any Tegra124 MMC controllers are present */ + count = fdtdec_find_aliases_for_id(blob, "sdhci", + COMPAT_NVIDIA_TEGRA124_SDMMC, node_list, MAX_HOSTS); + debug("%s: count of Tegra124 sdhci nodes is %d\n", __func__, count); + if (process_nodes(blob, node_list, count)) { + printf("%s: Error processing T30 mmc node(s)!\n", __func__); + return; + } + /* See if any Tegra30 MMC controllers are present */ count = fdtdec_find_aliases_for_id(blob, "sdhci", COMPAT_NVIDIA_TEGRA30_SDMMC, node_list, MAX_HOSTS); diff --git a/include/fdtdec.h b/include/fdtdec.h index 433d6a7..19bab79 100644 --- a/include/fdtdec.h +++ b/include/fdtdec.h @@ -59,6 +59,7 @@ enum fdt_compat_id { COMPAT_NVIDIA_TEGRA20_NAND, /* Tegra2 NAND controller */ COMPAT_NVIDIA_TEGRA20_PWM, /* Tegra 2 PWM controller */ COMPAT_NVIDIA_TEGRA20_DC, /* Tegra 2 Display controller */ + COMPAT_NVIDIA_TEGRA124_SDMMC, /* Tegra124 SDMMC controller */ COMPAT_NVIDIA_TEGRA30_SDMMC, /* Tegra30 SDMMC controller */ COMPAT_NVIDIA_TEGRA20_SDMMC, /* Tegra20 SDMMC controller */ COMPAT_NVIDIA_TEGRA20_SFLASH, /* Tegra 2 SPI flash controller */ diff --git a/lib/fdtdec.c b/lib/fdtdec.c index 207314f..1fecab3 100644 --- a/lib/fdtdec.c +++ b/lib/fdtdec.c @@ -32,6 +32,7 @@ static const char * const compat_names[COMPAT_COUNT] = { COMPAT(NVIDIA_TEGRA20_NAND, "nvidia,tegra20-nand"), COMPAT(NVIDIA_TEGRA20_PWM, "nvidia,tegra20-pwm"), COMPAT(NVIDIA_TEGRA20_DC, "nvidia,tegra20-dc"), + COMPAT(NVIDIA_TEGRA124_SDMMC, "nvidia,tegra124-sdhci"), COMPAT(NVIDIA_TEGRA30_SDMMC, "nvidia,tegra30-sdhci"), COMPAT(NVIDIA_TEGRA20_SDMMC, "nvidia,tegra20-sdhci"), COMPAT(NVIDIA_TEGRA20_SFLASH, "nvidia,tegra20-sflash"), |