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| author | Stefan Agner <stefan@agner.ch> | 2014-11-27 23:58:20 +0100 |
|---|---|---|
| committer | Stefano Babic <sbabic@denx.de> | 2014-12-01 10:20:22 +0100 |
| commit | 9e89a64fbd0ddfde17741b38cc95fbdc02679d86 (patch) | |
| tree | 81fc8ca2bf0c887d9136bcbc2940a13699128298 | |
| parent | 16159be761c2f8f2a3c33e307e5fc9865191e3da (diff) | |
| download | u-boot-imx-9e89a64fbd0ddfde17741b38cc95fbdc02679d86.zip u-boot-imx-9e89a64fbd0ddfde17741b38cc95fbdc02679d86.tar.gz u-boot-imx-9e89a64fbd0ddfde17741b38cc95fbdc02679d86.tar.bz2 | |
arm: vf610: improve evaluation of reset source
Improve the evaluation of the reset source. Bit description according
to latest reference manual rev. 7.
Signed-off-by: Stefan Agner <stefan@agner.ch>
| -rw-r--r-- | arch/arm/cpu/armv7/vf610/generic.c | 21 | ||||
| -rw-r--r-- | arch/arm/include/asm/arch-vf610/imx-regs.h | 8 |
2 files changed, 19 insertions, 10 deletions
diff --git a/arch/arm/cpu/armv7/vf610/generic.c b/arch/arm/cpu/armv7/vf610/generic.c index a26d63e..92aaad9 100644 --- a/arch/arm/cpu/armv7/vf610/generic.c +++ b/arch/arm/cpu/armv7/vf610/generic.c @@ -265,20 +265,21 @@ static char *get_reset_cause(void) cause = readl(&src_regs->srsr); writel(cause, &src_regs->srsr); - cause &= 0xff; - switch (cause) { - case 0x08: - return "WDOG"; - case 0x20: + if (cause & SRC_SRSR_POR_RST) + return "POWER ON RESET"; + else if (cause & SRC_SRSR_WDOG_A5) + return "WDOG A5"; + else if (cause & SRC_SRSR_WDOG_M4) + return "WDOG M4"; + else if (cause & SRC_SRSR_JTAG_RST) return "JTAG HIGH-Z"; - case 0x80: + else if (cause & SRC_SRSR_SW_RST) + return "SW RESET"; + else if (cause & SRC_SRSR_RESETB) return "EXTERNAL RESET"; - case 0xfd: - return "POR"; - default: + else return "unknown reset"; - } } int print_cpuinfo(void) diff --git a/arch/arm/include/asm/arch-vf610/imx-regs.h b/arch/arm/include/asm/arch-vf610/imx-regs.h index 9d797db..6b10bdf 100644 --- a/arch/arm/include/asm/arch-vf610/imx-regs.h +++ b/arch/arm/include/asm/arch-vf610/imx-regs.h @@ -256,6 +256,14 @@ #define DDRMC_CR161_TODTH_RD(v) (((v) & 0xf) << 8) #define DDRMC_CR161_TODTH_WR(v) ((v) & 0xf) +/* System Reset Controller (SRC) */ +#define SRC_SRSR_SW_RST (0x1 << 18) +#define SRC_SRSR_RESETB (0x1 << 7) +#define SRC_SRSR_JTAG_RST (0x1 << 5) +#define SRC_SRSR_WDOG_M4 (0x1 << 4) +#define SRC_SRSR_WDOG_A5 (0x1 << 3) +#define SRC_SRSR_POR_RST (0x1 << 0) + #if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__)) #include <asm/types.h> |