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| author | Peng Fan <peng.fan@nxp.com> | 2016-04-12 17:41:57 +0800 |
|---|---|---|
| committer | Peng Fan <peng.fan@nxp.com> | 2016-04-12 17:41:57 +0800 |
| commit | 79d4702dd9366e478611a199ea9b7f2c2fb2bf45 (patch) | |
| tree | 5db08f2e9b93639280747ad4fec4751b76f95755 | |
| parent | 584050b98cf070bb608b652e89659ff20c47efba (diff) | |
| download | u-boot-imx-79d4702dd9366e478611a199ea9b7f2c2fb2bf45.zip u-boot-imx-79d4702dd9366e478611a199ea9b7f2c2fb2bf45.tar.gz u-boot-imx-79d4702dd9366e478611a199ea9b7f2c2fb2bf45.tar.bz2 | |
MLK-12628 imx: mx6sx: enable MXC_CCM_CCGR3_LDB_DI0_OFFSET
MXC_CCM_CCGR3_LDB_DI0_OFFSET should not be disabled for i.MX6SX.
Otherwise met compile error. And Discard the if else.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
| -rw-r--r-- | arch/arm/include/asm/arch-mx6/crm_regs.h | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/arm/include/asm/arch-mx6/crm_regs.h b/arch/arm/include/asm/arch-mx6/crm_regs.h index 1f9d09e..724ee62 100644 --- a/arch/arm/include/asm/arch-mx6/crm_regs.h +++ b/arch/arm/include/asm/arch-mx6/crm_regs.h @@ -951,19 +951,19 @@ struct mxc_ccm_reg { #define MXC_CCM_CCGR3_IPU2_IPU_DI1_OFFSET 10 #define MXC_CCM_CCGR3_IPU2_IPU_DI1_MASK (3 << MXC_CCM_CCGR3_IPU2_IPU_DI1_OFFSET) #endif -#if defined(CONFIG_MX6SX) || defined(CONFIG_MX6UL) + #define MXC_CCM_CCGR3_GPIO4_CLK_OFFSET 12 #define MXC_CCM_CCGR3_GPIO4_CLK_MASK (3 << MXC_CCM_CCGR3_GPIO4_CLK_OFFSET) #define MXC_CCM_CCGR3_QSPI1_OFFSET 14 #define MXC_CCM_CCGR3_QSPI1_MASK (3 << MXC_CCM_CCGR3_QSPI1_OFFSET) -#else + #define MXC_CCM_CCGR3_LDB_DI0_OFFSET 12 #define MXC_CCM_CCGR3_LDB_DI0_MASK (3 << MXC_CCM_CCGR3_LDB_DI0_OFFSET) #define MXC_CCM_CCGR3_LDB_DI1_OFFSET 14 #define MXC_CCM_CCGR3_LDB_DI1_MASK (3 << MXC_CCM_CCGR3_LDB_DI1_OFFSET) #define MXC_CCM_CCGR3_MIPI_CORE_CFG_OFFSET 16 #define MXC_CCM_CCGR3_MIPI_CORE_CFG_MASK (3 << MXC_CCM_CCGR3_MIPI_CORE_CFG_OFFSET) -#endif + #ifdef CONFIG_MX6UL #define MXC_CCM_CCGR3_WDOG1_CLK_ENABLE_OFFSET 16 #define MXC_CCM_CCGR3_WDOG1_CLK_ENABLE_MASK (3 << MXC_CCM_CCGR3_WDOG1_CLK_ENABLE_OFFSET) |