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authorAneesh V <aneesh@ti.com>2011-08-11 04:35:43 +0000
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>2011-09-04 11:36:16 +0200
commit13d4f9bd7477b3b409f3e267b3b3d6fed5bd3e30 (patch)
tree1f72c79bf8489eb148738a7aab89813c843317bb
parentcba4b1809f043bf85c806e5a4e342f62bd5ded45 (diff)
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omap: enable caches at system start-up
Signed-off-by: Aneesh V <aneesh@ti.com>
-rw-r--r--arch/arm/cpu/armv7/omap3/board.c8
-rw-r--r--arch/arm/cpu/armv7/omap4/board.c8
2 files changed, 16 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv7/omap3/board.c b/arch/arm/cpu/armv7/omap3/board.c
index bce3ee6..0448bc9 100644
--- a/arch/arm/cpu/armv7/omap3/board.c
+++ b/arch/arm/cpu/armv7/omap3/board.c
@@ -402,3 +402,11 @@ void v7_outer_cache_disable(void)
omap3_update_aux_cr(0, 0x2);
}
#endif
+
+#ifndef CONFIG_SYS_DCACHE_OFF
+void enable_caches(void)
+{
+ /* Enable D-cache. I-cache is already enabled in start.S */
+ dcache_enable();
+}
+#endif
diff --git a/arch/arm/cpu/armv7/omap4/board.c b/arch/arm/cpu/armv7/omap4/board.c
index 8e90545..69a0ce5 100644
--- a/arch/arm/cpu/armv7/omap4/board.c
+++ b/arch/arm/cpu/armv7/omap4/board.c
@@ -299,3 +299,11 @@ void v7_outer_cache_disable(void)
set_pl310_ctrl_reg(0);
}
#endif
+
+#ifndef CONFIG_SYS_DCACHE_OFF
+void enable_caches(void)
+{
+ /* Enable D-cache. I-cache is already enabled in start.S */
+ dcache_enable();
+}
+#endif