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authorNorbert van Bolhuis <nvbolhuis@aimvalley.nl>2009-03-13 08:58:14 +0100
committerKim Phillips <kim.phillips@freescale.com>2009-03-14 17:43:58 -0500
commitb581626c1e2474a3dadf69d4f0e0582eccbc4235 (patch)
tree3dc96b012222043bf0baf8a107cd365080c3a66d
parent3c92217732edfc0016c3cbdc828471d013d23a36 (diff)
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mpc83xx: correctly set encryption and I2C bus 0 clock
This patch makes sure the correct mask is applied when setting the encryption and I2C bus 0 clock in SCCR. Failing to do so may lead to ENCCM being 0 in which case I2C bus 0 won't function. Signed-off-by: Norbert van Bolhuis <nvbolhuis@aimvalley.nl> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
-rw-r--r--cpu/mpc83xx/cpu_init.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/cpu/mpc83xx/cpu_init.c b/cpu/mpc83xx/cpu_init.c
index 491c2e5..8e9c875 100644
--- a/cpu/mpc83xx/cpu_init.c
+++ b/cpu/mpc83xx/cpu_init.c
@@ -106,7 +106,7 @@ void cpu_init_f (volatile immap_t * im)
#ifdef CONFIG_SYS_SCCR_ENCCM
/* Encryption clock mode */
im->clk.sccr = (im->clk.sccr & ~SCCR_ENCCM) |
- (CONFIG_SYS_SCCR_ENCCM << SCCR_PCICM_SHIFT);
+ (CONFIG_SYS_SCCR_ENCCM << SCCR_ENCCM_SHIFT);
#endif
#ifdef CONFIG_SYS_SCCR_PCICM