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| author | Gabor Juhos <juhosg@openwrt.org> | 2013-06-12 18:02:45 +0200 |
|---|---|---|
| committer | Tom Rini <trini@ti.com> | 2013-07-24 09:51:05 -0400 |
| commit | b1a14c471cb4ea633746e7249e468a86a69f2495 (patch) | |
| tree | 5e0cc1a70bf2344205b08e0ad343bb0f4b6101fc | |
| parent | b1591ec2461646556782dc7c6f9cbfada39302b0 (diff) | |
| download | u-boot-imx-b1a14c471cb4ea633746e7249e468a86a69f2495.zip u-boot-imx-b1a14c471cb4ea633746e7249e468a86a69f2495.tar.gz u-boot-imx-b1a14c471cb4ea633746e7249e468a86a69f2495.tar.bz2 | |
MIPS: remove obsolete TODO items
The MIPS code uses centralized u-boot.lds script already,
and dynamic relocation is supported as well.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
| -rw-r--r-- | doc/README.mips | 4 |
1 files changed, 0 insertions, 4 deletions
diff --git a/doc/README.mips b/doc/README.mips index f4f770b..b28f628 100644 --- a/doc/README.mips +++ b/doc/README.mips @@ -39,8 +39,6 @@ TODOs * Secondary cache support missing - * Centralize the link directive files - * Initialize TLB entries redardless of their use * R2000/R3000 class parts are not supported @@ -51,8 +49,6 @@ TODOs initialized in board specific assembler language before the cache init code is run -- that is, initialize the DRAM in lowlevel_init(). - * get rid of CONFIG_MANUAL_RELOC - * centralize/share more CPU code of MIPS32, MIPS64 and XBurst * support Qemu Malta |