powerpc: debris: remove orphan board

This board has been orphan for a while.
(Emails to its maintainer have been bouncing.)

Because MPC82xx family is old enough, nobody would pick up
the maintainership on it.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Wolfgang Denx <wd@denx.de>

7 files changed, 1 insertions, 1632 deletions

diff --git a/board/etin/debris/Makefile b/board/etin/debris/Makefile
deleted file mode 100644
index 2e74823..0000000
--- a/board/etin/debris/Makefile
+++ /dev/null
@@ -1,8 +0,0 @@
-#
-# (C) Copyright 2000-2006
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# SPDX-License-Identifier:	GPL-2.0+
-#
-
-obj-y =  debris.o flash.o phantom.o
diff --git a/board/etin/debris/debris.c b/board/etin/debris/debris.c
deleted file mode 100644
index 0308fef..0000000
--- a/board/etin/debris/debris.c
+++ /dev/null
@@ -1,174 +0,0 @@
-/*
- * (C) Copyright 2000
- * Sangmoon Kim, Etin Systems. dogoil@etinsys.com.
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#include <common.h>
-#include <mpc824x.h>
-#include <net.h>
-#include <pci.h>
-#include <i2c.h>
-#include <netdev.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-int checkboard (void)
-{
-	/*TODO: Check processor type */
-
-	puts (	"Board: Debris "
-#ifdef CONFIG_MPC8240
-		"8240"
-#endif
-#ifdef CONFIG_MPC8245
-		"8245"
-#endif
-		" ##Test not implemented yet##\n");
-	return 0;
-}
-
-#if 0	/* NOT USED */
-int checkflash (void)
-{
-	/* TODO: XXX XXX XXX */
-	printf ("## Test not implemented yet ##\n");
-
-	return (0);
-}
-#endif
-
-phys_size_t initdram (int board_type)
-{
-	int m, row, col, bank, i;
-	unsigned long start, end;
-	uint32_t mccr1;
-	uint32_t mear1 = 0, emear1 = 0, msar1 = 0, emsar1 = 0;
-	uint32_t mear2 = 0, emear2 = 0, msar2 = 0, emsar2 = 0;
-	uint8_t mber = 0;
-
-	i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
-
-	if (i2c_reg_read (0x50, 2) != 0x04) return 0;	/* Memory type */
-	m = i2c_reg_read (0x50, 5);	/* # of physical banks */
-	row = i2c_reg_read (0x50, 3);	/* # of rows */
-	col = i2c_reg_read (0x50, 4);	/* # of columns */
-	bank = i2c_reg_read (0x50, 17);	/* # of logical banks */
-
-	CONFIG_READ_WORD(MCCR1, mccr1);
-	mccr1 &= 0xffff0000;
-
-	start = CONFIG_SYS_SDRAM_BASE;
-	end = start + (1 << (col + row + 3) ) * bank - 1;
-
-	for (i = 0; i < m; i++) {
-		mccr1 |= ((row == 13)? 2 : (bank == 4)? 0 : 3) << i * 2;
-		if (i < 4) {
-			msar1  |= ((start >> 20) & 0xff) << i * 8;
-			emsar1 |= ((start >> 28) & 0xff) << i * 8;
-			mear1  |= ((end >> 20) & 0xff) << i * 8;
-			emear1 |= ((end >> 28) & 0xff) << i * 8;
-		} else {
-			msar2  |= ((start >> 20) & 0xff) << (i-4) * 8;
-			emsar2 |= ((start >> 28) & 0xff) << (i-4) * 8;
-			mear2  |= ((end >> 20) & 0xff) << (i-4) * 8;
-			emear2 |= ((end >> 28) & 0xff) << (i-4) * 8;
-		}
-		mber |= 1 << i;
-		start += (1 << (col + row + 3) ) * bank;
-		end += (1 << (col + row + 3) ) * bank;
-	}
-	for (; i < 8; i++) {
-		if (i < 4) {
-			msar1  |= 0xff << i * 8;
-			emsar1 |= 0x30 << i * 8;
-			mear1  |= 0xff << i * 8;
-			emear1 |= 0x30 << i * 8;
-		} else {
-			msar2  |= 0xff << (i-4) * 8;
-			emsar2 |= 0x30 << (i-4) * 8;
-			mear2  |= 0xff << (i-4) * 8;
-			emear2 |= 0x30 << (i-4) * 8;
-		}
-	}
-
-	CONFIG_WRITE_WORD(MCCR1, mccr1);
-	CONFIG_WRITE_WORD(MSAR1, msar1);
-	CONFIG_WRITE_WORD(EMSAR1, emsar1);
-	CONFIG_WRITE_WORD(MEAR1, mear1);
-	CONFIG_WRITE_WORD(EMEAR1, emear1);
-	CONFIG_WRITE_WORD(MSAR2, msar2);
-	CONFIG_WRITE_WORD(EMSAR2, emsar2);
-	CONFIG_WRITE_WORD(MEAR2, mear2);
-	CONFIG_WRITE_WORD(EMEAR2, emear2);
-	CONFIG_WRITE_BYTE(MBER, mber);
-
-	return (1 << (col + row + 3) ) * bank * m;
-}
-
-/*
- * Initialize PCI Devices, report devices found.
- */
-#ifndef CONFIG_PCI_PNP
-static struct pci_config_table pci_debris_config_table[] = {
-	{ PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 0x0f, PCI_ANY_ID,
-	  pci_cfgfunc_config_device, { PCI_ENET0_IOADDR,
-				       PCI_ENET0_MEMADDR,
-				       PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER }},
-	{ PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 0x10, PCI_ANY_ID,
-	  pci_cfgfunc_config_device, { PCI_ENET1_IOADDR,
-				       PCI_ENET1_MEMADDR,
-				       PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER }},
-	{ }
-};
-#endif
-
-struct pci_controller hose = {
-#ifndef CONFIG_PCI_PNP
-	config_table: pci_debris_config_table,
-#endif
-};
-
-void pci_init_board(void)
-{
-	pci_mpc824x_init(&hose);
-}
-
-void *nvram_read(void *dest, const long src, size_t count)
-{
-	volatile uchar *d = (volatile uchar*) dest;
-	volatile uchar *s = (volatile uchar*) src;
-	while(count--) {
-		*d++ = *s++;
-		asm volatile("sync");
-	}
-	return dest;
-}
-
-void nvram_write(long dest, const void *src, size_t count)
-{
-	volatile uchar *d = (volatile uchar*)dest;
-	volatile uchar *s = (volatile uchar*)src;
-	while(count--) {
-		*d++ = *s++;
-		asm volatile("sync");
-	}
-}
-
-int misc_init_r(void)
-{
-	uchar ethaddr[6];
-
-	if (eth_getenv_enetaddr("ethaddr", ethaddr))
-		/* Write ethernet addr in NVRAM for VxWorks */
-		nvram_write(CONFIG_ENV_ADDR + CONFIG_SYS_NVRAM_VXWORKS_OFFS,
-				ethaddr, 6);
-
-	return 0;
-}
-
-int board_eth_init(bd_t *bis)
-{
-	return pci_eth_init(bis);
-}
diff --git a/board/etin/debris/flash.c b/board/etin/debris/flash.c
deleted file mode 100644
index 2657958..0000000
--- a/board/etin/debris/flash.c
+++ /dev/null
@@ -1,705 +0,0 @@
-/*
- * board/eva/flash.c
- *
- * (C) Copyright 2002
- * Sangmoon Kim, Etin Systems, dogoil@etinsys.com.
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#include <common.h>
-#include <asm/processor.h>
-#include <asm/pci_io.h>
-#include <mpc824x.h>
-#include <asm/mmu.h>
-
-int (*do_flash_erase)(flash_info_t*, uint32_t, uint32_t);
-int (*write_dword)(flash_info_t*, ulong, uint64_t);
-
-typedef uint64_t cfi_word;
-
-#define cfi_read(flash, addr) *((volatile cfi_word*)(flash->start[0] + addr))
-
-#define cfi_write(flash, val, addr) \
-	move64((cfi_word*)&val, \
-			(cfi_word*)(flash->start[0] + addr))
-
-#define CMD(x) ((((cfi_word)x)<<48)|(((cfi_word)x)<<32)|(((cfi_word)x)<<16)|(((cfi_word)x)))
-
-static void write32(unsigned long addr, uint32_t value)
-{
-	*(volatile uint32_t*)(addr) = value;
-	asm volatile("sync");
-}
-
-static uint32_t read32(unsigned long addr)
-{
-	uint32_t value;
-	value = *(volatile uint32_t*)addr;
-	asm volatile("sync");
-	return value;
-}
-
-static cfi_word cfi_cmd(flash_info_t *flash, uint8_t cmd, uint32_t addr)
-{
-	uint32_t base = flash->start[0];
-	uint32_t val=(cmd << 16) | cmd;
-	addr <<= 3;
-	write32(base + addr, val);
-	return addr;
-}
-
-static uint16_t cfi_read_query(flash_info_t *flash, uint32_t addr)
-{
-	uint32_t base = flash->start[0];
-	addr <<= 3;
-	return (uint16_t)read32(base + addr);
-}
-
-flash_info_t    flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
-static void move64(uint64_t *src, uint64_t *dest)
-{
-	asm volatile("lfd  0, 0(3)\n\t" /* fpr0   =  *scr       */
-	 "stfd 0, 0(4)"         /* *dest  =  fpr0       */
-	 : : : "fr0" );         /* Clobbers fr0         */
-	return;
-}
-
-static int cfi_write_dword(flash_info_t *flash, ulong dest, cfi_word data)
-{
-	unsigned long start;
-	cfi_word status = 0;
-
-	status = cfi_read(flash, dest);
-	data &= status;
-
-	cfi_cmd(flash, 0x40, 0);
-	cfi_write(flash, data, dest);
-
-	udelay(10);
-	start = get_timer (0);
-	for(;;) {
-		status = cfi_read(flash, dest);
-		status &= CMD(0x80);
-		if(status == CMD(0x80))
-			break;
-		if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) {
-			cfi_cmd(flash, 0xff, 0);
-			return 1;
-		}
-		udelay(1);
-	}
-	cfi_cmd(flash, 0xff, 0);
-
-	return 0;
-}
-
-static int jedec_write_dword (flash_info_t *flash, ulong dest, cfi_word data)
-{
-	ulong start;
-	cfi_word status = 0;
-
-	status = cfi_read(flash, dest);
-	if(status != CMD(0xffff)) return 2;
-
-	cfi_cmd(flash, 0xaa, 0x555);
-	cfi_cmd(flash, 0x55, 0x2aa);
-	cfi_cmd(flash, 0xa0, 0x555);
-
-	cfi_write(flash, data, dest);
-
-	udelay(10);
-	start = get_timer (0);
-	status = ~data;
-	while(status != data) {
-		if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT)
-			return 1;
-		status = cfi_read(flash, dest);
-		udelay(1);
-	}
-	return 0;
-}
-
-static __inline__ unsigned long get_msr(void)
-{
-	unsigned long msr;
-	__asm__ __volatile__ ("mfmsr %0" : "=r" (msr) :);
-	return msr;
-}
-
-static __inline__ void set_msr(unsigned long msr)
-{
-	__asm__ __volatile__ ("mtmsr %0" : : "r" (msr));
-}
-
-int write_buff (flash_info_t *flash, uchar *src, ulong addr, ulong cnt)
-{
-	ulong wp;
-	int i, s, l, rc;
-	cfi_word data;
-	uint8_t *t = (uint8_t*)&data;
-	unsigned long base = flash->start[0];
-	uint32_t msr;
-
-	if (flash->flash_id == FLASH_UNKNOWN)
-		return 4;
-
-	if (cnt == 0)
-		return 0;
-
-	addr -= base;
-
-	msr = get_msr();
-	set_msr(msr|MSR_FP);
-
-	wp = (addr & ~7);   /* get lower word aligned address */
-
-	if((addr-wp) != 0) {
-		data = cfi_read(flash, wp);
-		s = addr & 7;
-		l = ( cnt < (8-s) ) ? cnt : (8-s);
-		for(i = 0; i < l; i++)
-			t[s+i] = *src++;
-		if ((rc = write_dword(flash, wp, data)) != 0)
-			goto DONE;
-		wp += 8;
-		cnt -= l;
-	}
-
-	while (cnt >= 8) {
-		for (i = 0; i < 8; i++)
-			t[i] = *src++;
-		if ((rc = write_dword(flash, wp, data)) != 0)
-			goto DONE;
-		wp  += 8;
-		cnt -= 8;
-	}
-
-	if (cnt == 0) {
-		rc = 0;
-		goto DONE;
-	}
-
-	data = cfi_read(flash, wp);
-	for(i = 0; i < cnt; i++)
-		t[i] = *src++;
-	rc = write_dword(flash, wp, data);
-DONE:
-	set_msr(msr);
-	return rc;
-}
-
-static int cfi_erase_oneblock(flash_info_t *flash, uint32_t sect)
-{
-	int sa;
-	int flag;
-	ulong start, last, now;
-	cfi_word status;
-
-	flag = disable_interrupts();
-
-	sa = (flash->start[sect] - flash->start[0]);
-	write32(flash->start[sect], 0x00200020);
-	write32(flash->start[sect], 0x00d000d0);
-
-	if (flag)
-		enable_interrupts();
-
-	udelay(1000);
-	start = get_timer (0);
-	last  = start;
-
-	for (;;) {
-		status = cfi_read(flash, sa);
-		status &= CMD(0x80);
-		if (status == CMD(0x80))
-			break;
-		if ((now = get_timer(start)) > CONFIG_SYS_FLASH_ERASE_TOUT) {
-			cfi_cmd(flash, 0xff, 0);
-			printf ("Timeout\n");
-			return ERR_TIMOUT;
-		}
-
-		if ((now - last) > 1000) {
-			serial_putc ('.');
-			last = now;
-		}
-		udelay(10);
-	}
-	cfi_cmd(flash, 0xff, 0);
-	return ERR_OK;
-}
-
-static int cfi_erase(flash_info_t *flash, uint32_t s_first, uint32_t s_last)
-{
-	int sect;
-	int rc = ERR_OK;
-
-	for (sect = s_first; sect <= s_last; sect++) {
-		if (flash->protect[sect] == 0) {
-			rc = cfi_erase_oneblock(flash, sect);
-			if (rc != ERR_OK) break;
-		}
-	}
-	printf (" done\n");
-	return rc;
-}
-
-static int jedec_erase(flash_info_t *flash, uint32_t s_first, uint32_t s_last)
-{
-	int sect;
-	cfi_word status;
-	int sa = -1;
-	int flag;
-	ulong start, last, now;
-
-	flag = disable_interrupts();
-
-	cfi_cmd(flash, 0xaa, 0x555);
-	cfi_cmd(flash, 0x55, 0x2aa);
-	cfi_cmd(flash, 0x80, 0x555);
-	cfi_cmd(flash, 0xaa, 0x555);
-	cfi_cmd(flash, 0x55, 0x2aa);
-	for ( sect = s_first; sect <= s_last; sect++) {
-		if (flash->protect[sect] == 0) {
-			sa = flash->start[sect] - flash->start[0];
-			write32(flash->start[sect], 0x00300030);
-		}
-	}
-	if (flag)
-		enable_interrupts();
-
-	if (sa < 0)
-		goto DONE;
-
-	udelay (1000);
-	start = get_timer (0);
-	last  = start;
-	for(;;) {
-		status = cfi_read(flash, sa);
-		if (status == CMD(0xffff))
-			break;
-
-		if ((now = get_timer(start)) > CONFIG_SYS_FLASH_ERASE_TOUT) {
-			printf ("Timeout\n");
-			return ERR_TIMOUT;
-		}
-
-		if ((now - last) > 1000) {
-			serial_putc ('.');
-			last = now;
-		}
-		udelay(10);
-	}
-DONE:
-	cfi_cmd(flash, 0xf0, 0);
-
-	printf (" done\n");
-
-	return ERR_OK;
-}
-
-int flash_erase (flash_info_t *flash, int s_first, int s_last)
-{
-	int sect;
-	int prot;
-
-	if ((s_first < 0) || (s_first > s_last)) {
-		if (flash->flash_id == FLASH_UNKNOWN)
-			printf ("- missing\n");
-		else
-			printf ("- no sectors to erase\n");
-		return ERR_NOT_ERASED;
-	}
-	if (flash->flash_id == FLASH_UNKNOWN) {
-		printf ("Can't erase unknown flash type - aborted\n");
-		return ERR_NOT_ERASED;
-	}
-
-	prot = 0;
-	for (sect = s_first; sect <= s_last; sect++)
-		if (flash->protect[sect]) prot++;
-
-	if (prot)
-		printf ("- Warning: %d protected sectors will not be erased!\n",
-								prot);
-	else
-		printf ("\n");
-
-	return do_flash_erase(flash, s_first, s_last);
-}
-
-struct jedec_flash_info {
-	const uint16_t mfr_id;
-	const uint16_t dev_id;
-	const char *name;
-	const int DevSize;
-	const int InterfaceDesc;
-	const int NumEraseRegions;
-	const ulong regions[4];
-};
-
-#define ERASEINFO(size,blocks) (size<<8)|(blocks-1)
-
-#define SIZE_1MiB 20
-#define SIZE_2MiB 21
-#define SIZE_4MiB 22
-
-static const struct jedec_flash_info jedec_table[] = {
-	{
-		mfr_id: (uint16_t)AMD_MANUFACT,
-		dev_id: (uint16_t)AMD_ID_LV800T,
-		name: "AMD AM29LV800T",
-		DevSize: SIZE_1MiB,
-		NumEraseRegions: 4,
-		regions: {ERASEINFO(0x10000,15),
-			  ERASEINFO(0x08000,1),
-			  ERASEINFO(0x02000,2),
-			  ERASEINFO(0x04000,1)
-		}
-	}, {
-		mfr_id: (uint16_t)AMD_MANUFACT,
-		dev_id: (uint16_t)AMD_ID_LV800B,
-		name: "AMD AM29LV800B",
-		DevSize: SIZE_1MiB,
-		NumEraseRegions: 4,
-		regions: {ERASEINFO(0x10000,15),
-			  ERASEINFO(0x08000,1),
-			  ERASEINFO(0x02000,2),
-			  ERASEINFO(0x04000,1)
-		}
-	}, {
-		mfr_id: (uint16_t)AMD_MANUFACT,
-		dev_id: (uint16_t)AMD_ID_LV160T,
-		name: "AMD AM29LV160T",
-		DevSize: SIZE_2MiB,
-		NumEraseRegions: 4,
-		regions: {ERASEINFO(0x10000,31),
-			  ERASEINFO(0x08000,1),
-			  ERASEINFO(0x02000,2),
-			  ERASEINFO(0x04000,1)
-		}
-	}, {
-		mfr_id: (uint16_t)AMD_MANUFACT,
-		dev_id: (uint16_t)AMD_ID_LV160B,
-		name: "AMD AM29LV160B",
-		DevSize: SIZE_2MiB,
-		NumEraseRegions: 4,
-		regions: {ERASEINFO(0x04000,1),
-			  ERASEINFO(0x02000,2),
-			  ERASEINFO(0x08000,1),
-			  ERASEINFO(0x10000,31)
-		}
-	}, {
-		mfr_id: (uint16_t)AMD_MANUFACT,
-		dev_id: (uint16_t)AMD_ID_LV320T,
-		name: "AMD AM29LV320T",
-		DevSize: SIZE_4MiB,
-		NumEraseRegions: 2,
-		regions: {ERASEINFO(0x10000,63),
-			  ERASEINFO(0x02000,8)
-		}
-
-	}, {
-		mfr_id: (uint16_t)AMD_MANUFACT,
-		dev_id: (uint16_t)AMD_ID_LV320B,
-		name: "AMD AM29LV320B",
-		DevSize: SIZE_4MiB,
-		NumEraseRegions: 2,
-		regions: {ERASEINFO(0x02000,8),
-			  ERASEINFO(0x10000,63)
-		}
-	}
-};
-
-static ulong cfi_init(uint32_t base,  flash_info_t *flash)
-{
-	int sector;
-	int block;
-	int block_count;
-	int offset = 0;
-	int reverse = 0;
-	int primary;
-	int mfr_id;
-	int dev_id;
-
-	flash->start[0] = base;
-	cfi_cmd(flash, 0xF0, 0);
-	cfi_cmd(flash, 0x98, 0);
-	if ( !( cfi_read_query(flash, 0x10) == 'Q' &&
-		cfi_read_query(flash, 0x11) == 'R' &&
-		cfi_read_query(flash, 0x12) == 'Y' )) {
-		cfi_cmd(flash, 0xff, 0);
-		return 0;
-	}
-
-	flash->size = 1 << cfi_read_query(flash, 0x27);
-	flash->size *= 4;
-	block_count = cfi_read_query(flash, 0x2c);
-	primary = cfi_read_query(flash, 0x15);
-	if ( cfi_read_query(flash, primary + 4) == 0x30)
-		reverse = (cfi_read_query(flash, 0x1) & 0x01);
-	else
-		reverse = (cfi_read_query(flash, primary+15) == 3);
-
-	flash->sector_count = 0;
-
-	for ( block = reverse ? block_count - 1	: 0;
-		      reverse ? block >= 0	: block < block_count;
-		      reverse ? block--		: block ++) {
-		int sector_size =
-			(cfi_read_query(flash, 0x2d + block*4+2) |
-			(cfi_read_query(flash, 0x2d + block*4+3) << 8)) << 8;
-		int sector_count =
-			(cfi_read_query(flash, 0x2d + block*4+0) |
-			(cfi_read_query(flash, 0x2d + block*4+1) << 8)) + 1;
-		for(sector = 0; sector < sector_count; sector++) {
-			flash->start[flash->sector_count++] = base + offset;
-			offset += sector_size * 4;
-		}
-	}
-	mfr_id = cfi_read_query(flash, 0x00);
-	dev_id = cfi_read_query(flash, 0x01);
-
-	cfi_cmd(flash, 0xff, 0);
-
-	flash->flash_id = (mfr_id << 16) | dev_id;
-
-	for (sector = 0; sector < flash->sector_count; sector++) {
-		write32(flash->start[sector], 0x00600060);
-		write32(flash->start[sector], 0x00d000d0);
-	}
-	cfi_cmd(flash, 0xff, 0);
-
-	for (sector = 0; sector < flash->sector_count; sector++)
-		flash->protect[sector] = 0;
-
-	do_flash_erase = cfi_erase;
-	write_dword = cfi_write_dword;
-
-	return flash->size;
-}
-
-static ulong jedec_init(unsigned long base, flash_info_t *flash)
-{
-	int i;
-	int block, block_count;
-	int sector, offset;
-	int mfr_id, dev_id;
-	flash->start[0] = base;
-	cfi_cmd(flash, 0xF0, 0x000);
-	cfi_cmd(flash, 0xAA, 0x555);
-	cfi_cmd(flash, 0x55, 0x2AA);
-	cfi_cmd(flash, 0x90, 0x555);
-	mfr_id = cfi_read_query(flash, 0x000);
-	dev_id = cfi_read_query(flash, 0x0001);
-	cfi_cmd(flash, 0xf0, 0x000);
-
-	for(i=0; i<sizeof(jedec_table)/sizeof(struct jedec_flash_info); i++) {
-		if((jedec_table[i].mfr_id == mfr_id) &&
-			(jedec_table[i].dev_id == dev_id)) {
-
-			flash->flash_id = (mfr_id << 16) | dev_id;
-			flash->size = 1 << jedec_table[0].DevSize;
-			flash->size *= 4;
-			block_count = jedec_table[i].NumEraseRegions;
-			offset = 0;
-			flash->sector_count = 0;
-			for (block = 0; block < block_count; block++) {
-				int sector_size = jedec_table[i].regions[block];
-				int sector_count = (sector_size & 0xff) + 1;
-				sector_size >>= 8;
-				for (sector=0; sector<sector_count; sector++) {
-					flash->start[flash->sector_count++] =
-						base + offset;
-					offset += sector_size * 4;
-				}
-			}
-			break;
-		}
-	}
-
-	for (sector = 0; sector < flash->sector_count; sector++)
-		flash->protect[sector] = 0;
-
-	do_flash_erase = jedec_erase;
-	write_dword = jedec_write_dword;
-
-	return flash->size;
-}
-
-inline void mtibat1u(unsigned int x)
-{
-	__asm__ __volatile__ ("mtspr   530, %0" :: "r" (x));
-}
-
-inline void mtibat1l(unsigned int x)
-{
-	__asm__ __volatile__ ("mtspr   531, %0" :: "r" (x));
-}
-
-inline void mtdbat1u(unsigned int x)
-{
-	__asm__ __volatile__ ("mtspr   538, %0" :: "r" (x));
-}
-
-inline void mtdbat1l(unsigned int x)
-{
-	__asm__ __volatile__ ("mtspr   539, %0" :: "r" (x));
-}
-
-unsigned long flash_init (void)
-{
-	unsigned long size = 0;
-	int i;
-	unsigned int msr;
-
-	/* BAT1 */
-	CONFIG_WRITE_WORD(ERCR3, 0x0C00000C);
-	CONFIG_WRITE_WORD(ERCR4, 0x0800000C);
-	msr = get_msr();
-	set_msr(msr & ~(MSR_IR | MSR_DR));
-	mtibat1l(0x70000000 | BATL_PP_10 | BATL_CACHEINHIBIT);
-	mtibat1u(0x70000000 | BATU_BL_256M | BATU_VS | BATU_VP);
-	mtdbat1l(0x70000000 | BATL_PP_10 | BATL_CACHEINHIBIT);
-	mtdbat1u(0x70000000 | BATU_BL_256M | BATU_VS | BATU_VP);
-	set_msr(msr);
-
-	for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++)
-		flash_info[i].flash_id = FLASH_UNKNOWN;
-	size = cfi_init(FLASH_BASE0_PRELIM, &flash_info[0]);
-	if (!size)
-		size = jedec_init(FLASH_BASE0_PRELIM, &flash_info[0]);
-
-	if (flash_info[0].flash_id == FLASH_UNKNOWN)
-		printf ("# Unknown FLASH on Bank 1 - Size = 0x%08lx = %ld MB\n",
-			size, size<<20);
-
-	return size;
-}
-
-void flash_print_info  (flash_info_t *flash)
-{
-	int i;
-	int k;
-	int size;
-	int erased;
-	volatile unsigned long *p;
-
-	if (flash->flash_id == FLASH_UNKNOWN) {
-		printf ("missing or unknown FLASH type\n");
-		flash_init();
-	}
-
-	if (flash->flash_id == FLASH_UNKNOWN) {
-		printf ("missing or unknown FLASH type\n");
-		return;
-	}
-
-	switch (((flash->flash_id) >> 16) & 0xff) {
-	case 0x01:
-		printf ("AMD ");
-		break;
-	case 0x04:
-		printf("FUJITSU ");
-		break;
-	case 0x20:
-		printf("STM ");
-		break;
-	case 0xBF:
-		printf("SST ");
-		break;
-	case 0x89:
-	case 0xB0:
-		printf("INTEL ");
-		break;
-	default:
-		printf ("Unknown Vendor ");
-		break;
-	}
-
-	switch ((flash->flash_id) & 0xffff) {
-	case (uint16_t)AMD_ID_LV800T:
-		printf ("AM29LV800T\n");
-		break;
-	case (uint16_t)AMD_ID_LV800B:
-		printf ("AM29LV800B\n");
-		break;
-	case (uint16_t)AMD_ID_LV160T:
-		printf ("AM29LV160T\n");
-		break;
-	case (uint16_t)AMD_ID_LV160B:
-		printf ("AM29LV160B\n");
-		break;
-	case (uint16_t)AMD_ID_LV320T:
-		printf ("AM29LV320T\n");
-		break;
-	case (uint16_t)AMD_ID_LV320B:
-		printf ("AM29LV320B\n");
-		break;
-	case (uint16_t)INTEL_ID_28F800C3T:
-		printf ("28F800C3T\n");
-		break;
-	case (uint16_t)INTEL_ID_28F800C3B:
-		printf ("28F800C3B\n");
-		break;
-	case (uint16_t)INTEL_ID_28F160C3T:
-		printf ("28F160C3T\n");
-		break;
-	case (uint16_t)INTEL_ID_28F160C3B:
-		printf ("28F160C3B\n");
-		break;
-	case (uint16_t)INTEL_ID_28F320C3T:
-		printf ("28F320C3T\n");
-		break;
-	case (uint16_t)INTEL_ID_28F320C3B:
-		printf ("28F320C3B\n");
-		break;
-	case (uint16_t)INTEL_ID_28F640C3T:
-		printf ("28F640C3T\n");
-		break;
-	case (uint16_t)INTEL_ID_28F640C3B:
-		printf ("28F640C3B\n");
-		break;
-	default:
-		printf ("Unknown Chip Type\n");
-		break;
-	}
-
-	if (flash->size >= (1 << 20)) {
-		printf ("  Size: %ld MB in %d Sectors\n",
-				flash->size >> 20, flash->sector_count);
-	} else {
-		printf ("  Size: %ld kB in %d Sectors\n",
-				flash->size >> 10, flash->sector_count);
-	}
-
-	printf ("  Sector Start Addresses:");
-	for (i = 0; i < flash->sector_count; ++i) {
-		/* Check if whole sector is erased*/
-		if (i != (flash->sector_count-1))
-			size = flash->start[i+1] - flash->start[i];
-		else
-			size = flash->start[0] + flash->size - flash->start[i];
-
-		erased = 1;
-		p = (volatile unsigned long *)flash->start[i];
-		size = size >> 2;        /* divide by 4 for longword access */
-		for (k=0; k<size; k++) {
-			if (*p++ != 0xffffffff) {
-				erased = 0;
-				break;
-			}
-		}
-
-		if ((i % 5) == 0)
-			printf ("\n   ");
-
-		printf (" %08lX%s%s",
-			flash->start[i],
-			erased ? " E" : "  ",
-			flash->protect[i] ? "RO " : "   ");
-	}
-	printf ("\n");
-}
diff --git a/board/etin/debris/phantom.c b/board/etin/debris/phantom.c
deleted file mode 100644
index 3d5aa14..0000000
--- a/board/etin/debris/phantom.c
+++ /dev/null
@@ -1,301 +0,0 @@
-/*
- * board/eva/phantom.c
- *
- * Phantom RTC device driver for EVA
- *
- * Author: Sangmoon Kim
- *         dogoil@etinsys.com
- *
- * Copyright 2002 Etinsys Inc.
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#include <common.h>
-#include <command.h>
-#include <rtc.h>
-
-#if defined(CONFIG_CMD_DATE)
-
-#define RTC_BASE (CONFIG_SYS_NVRAM_BASE_ADDR + 0x7fff8)
-
-#define RTC_YEAR                ( RTC_BASE + 7 )
-#define RTC_MONTH               ( RTC_BASE + 6 )
-#define RTC_DAY_OF_MONTH        ( RTC_BASE + 5 )
-#define RTC_DAY_OF_WEEK         ( RTC_BASE + 4 )
-#define RTC_HOURS               ( RTC_BASE + 3 )
-#define RTC_MINUTES             ( RTC_BASE + 2 )
-#define RTC_SECONDS             ( RTC_BASE + 1 )
-#define RTC_CENTURY             ( RTC_BASE + 0 )
-
-#define RTC_CONTROLA            RTC_CENTURY
-#define RTC_CONTROLB            RTC_SECONDS
-#define RTC_CONTROLC            RTC_DAY_OF_WEEK
-
-#define RTC_CA_WRITE            0x80
-#define RTC_CA_READ             0x40
-
-#define RTC_CB_OSC_DISABLE      0x80
-
-#define RTC_CC_BATTERY_FLAG     0x80
-#define RTC_CC_FREQ_TEST        0x40
-
-
-static int phantom_flag = -1;
-static int century_flag = -1;
-
-static uchar rtc_read(unsigned int addr)
-{
-	return *(volatile unsigned char *)(addr);
-}
-
-static void rtc_write(unsigned int addr, uchar val)
-{
-	*(volatile unsigned char *)(addr) = val;
-}
-
-static unsigned char phantom_rtc_sequence[] = {
-	0xc5, 0x3a, 0xa3, 0x5c, 0xc5, 0x3a, 0xa3, 0x5c
-};
-
-static unsigned char* phantom_rtc_read(int addr, unsigned char rtc[8])
-{
-	int i, j;
-	unsigned char v;
-	unsigned char save = rtc_read(addr);
-
-	for (j = 0; j < 8; j++) {
-		v = phantom_rtc_sequence[j];
-		for (i = 0; i < 8; i++) {
-			rtc_write(addr, v & 1);
-			v >>= 1;
-		}
-	}
-	for (j = 0; j < 8; j++) {
-		v = 0;
-		for (i = 0; i < 8; i++) {
-			if(rtc_read(addr) & 1)
-				v |= 1 << i;
-		}
-		rtc[j] = v;
-	}
-	rtc_write(addr, save);
-	return rtc;
-}
-
-static void phantom_rtc_write(int addr, unsigned char rtc[8])
-{
-	int i, j;
-	unsigned char v;
-	unsigned char save = rtc_read(addr);
-	for (j = 0; j < 8; j++) {
-		v = phantom_rtc_sequence[j];
-		for (i = 0; i < 8; i++) {
-			rtc_write(addr, v & 1);
-			v >>= 1;
-		}
-	}
-	for (j = 0; j < 8; j++) {
-		v = rtc[j];
-		for (i = 0; i < 8; i++) {
-			rtc_write(addr, v & 1);
-			v >>= 1;
-		}
-	}
-	rtc_write(addr, save);
-}
-
-static int get_phantom_flag(void)
-{
-	int i;
-	unsigned char rtc[8];
-
-	phantom_rtc_read(RTC_BASE, rtc);
-
-	for(i = 1; i < 8; i++) {
-		if (rtc[i] != rtc[0])
-			return 1;
-	}
-	return 0;
-}
-
-void rtc_reset(void)
-{
-	if (phantom_flag < 0)
-		phantom_flag = get_phantom_flag();
-
-	if (phantom_flag) {
-		unsigned char rtc[8];
-		phantom_rtc_read(RTC_BASE, rtc);
-		if(rtc[4] & 0x30) {
-			printf( "real-time-clock was stopped. Now starting...\n" );
-			rtc[4] &= 0x07;
-			phantom_rtc_write(RTC_BASE, rtc);
-		}
-	} else {
-		uchar reg_a, reg_b, reg_c;
-		reg_a = rtc_read( RTC_CONTROLA );
-		reg_b = rtc_read( RTC_CONTROLB );
-
-		if ( reg_b & RTC_CB_OSC_DISABLE )
-		{
-			printf( "real-time-clock was stopped. Now starting...\n" );
-			reg_a |= RTC_CA_WRITE;
-			reg_b &= ~RTC_CB_OSC_DISABLE;
-			rtc_write( RTC_CONTROLA, reg_a );
-			rtc_write( RTC_CONTROLB, reg_b );
-		}
-
-		/* make sure read/write clock register bits are cleared */
-		reg_a &= ~( RTC_CA_WRITE | RTC_CA_READ );
-		rtc_write( RTC_CONTROLA, reg_a );
-
-		reg_c = rtc_read( RTC_CONTROLC );
-		if (( reg_c & RTC_CC_BATTERY_FLAG ) == 0 )
-			printf( "RTC battery low. Clock setting may not be reliable.\n");
-	}
-}
-
-static int get_century_flag(void)
-{
-	int flag = 0;
-	int bcd, century;
-	bcd = rtc_read( RTC_CENTURY );
-	century = bcd2bin( bcd & 0x3F );
-	rtc_write( RTC_CENTURY, bin2bcd(century+1));
-	if (bcd == rtc_read( RTC_CENTURY ))
-		flag = 1;
-	rtc_write( RTC_CENTURY, bcd);
-	return flag;
-}
-
-int rtc_get( struct rtc_time *tmp)
-{
-	if (phantom_flag < 0)
-		phantom_flag = get_phantom_flag();
-
-	if (phantom_flag)
-	{
-		unsigned char rtc[8];
-
-		phantom_rtc_read(RTC_BASE, rtc);
-
-		tmp->tm_sec	= bcd2bin(rtc[1] & 0x7f);
-		tmp->tm_min	= bcd2bin(rtc[2] & 0x7f);
-		tmp->tm_hour	= bcd2bin(rtc[3] & 0x1f);
-		tmp->tm_wday	= bcd2bin(rtc[4] & 0x7);
-		tmp->tm_mday	= bcd2bin(rtc[5] & 0x3f);
-		tmp->tm_mon	= bcd2bin(rtc[6] & 0x1f);
-		tmp->tm_year	= bcd2bin(rtc[7]) + 1900;
-		tmp->tm_yday = 0;
-		tmp->tm_isdst = 0;
-
-		if( (rtc[3] & 0x80)  && (rtc[3] & 0x40) ) tmp->tm_hour += 12;
-		if (tmp->tm_year < 1970) tmp->tm_year += 100;
-	} else {
-		uchar sec, min, hour;
-		uchar mday, wday, mon, year;
-
-		int century;
-
-		uchar reg_a;
-
-		if (century_flag < 0)
-			century_flag = get_century_flag();
-
-		reg_a = rtc_read( RTC_CONTROLA );
-		/* lock clock registers for read */
-		rtc_write( RTC_CONTROLA, ( reg_a | RTC_CA_READ ));
-
-		sec     = rtc_read( RTC_SECONDS );
-		min     = rtc_read( RTC_MINUTES );
-		hour    = rtc_read( RTC_HOURS );
-		mday    = rtc_read( RTC_DAY_OF_MONTH );
-		wday    = rtc_read( RTC_DAY_OF_WEEK );
-		mon     = rtc_read( RTC_MONTH );
-		year    = rtc_read( RTC_YEAR );
-		century = rtc_read( RTC_CENTURY );
-
-		/* unlock clock registers after read */
-		rtc_write( RTC_CONTROLA, ( reg_a & ~RTC_CA_READ ));
-
-		tmp->tm_sec  = bcd2bin( sec  & 0x7F );
-		tmp->tm_min  = bcd2bin( min  & 0x7F );
-		tmp->tm_hour = bcd2bin( hour & 0x3F );
-		tmp->tm_mday = bcd2bin( mday & 0x3F );
-		tmp->tm_mon  = bcd2bin( mon & 0x1F );
-		tmp->tm_wday = bcd2bin( wday & 0x07 );
-
-		if (century_flag) {
-			tmp->tm_year = bcd2bin( year ) +
-				( bcd2bin( century & 0x3F ) * 100 );
-		} else {
-			tmp->tm_year = bcd2bin( year ) + 1900;
-			if (tmp->tm_year < 1970) tmp->tm_year += 100;
-		}
-
-		tmp->tm_yday = 0;
-		tmp->tm_isdst= 0;
-	}
-
-	return 0;
-}
-
-int rtc_set( struct rtc_time *tmp )
-{
-	if (phantom_flag < 0)
-		phantom_flag = get_phantom_flag();
-
-	if (phantom_flag) {
-		uint year;
-		unsigned char rtc[8];
-
-		year = tmp->tm_year;
-		year -= (year < 2000) ? 1900 : 2000;
-
-		rtc[0] = bin2bcd(0);
-		rtc[1] = bin2bcd(tmp->tm_sec);
-		rtc[2] = bin2bcd(tmp->tm_min);
-		rtc[3] = bin2bcd(tmp->tm_hour);
-		rtc[4] = bin2bcd(tmp->tm_wday);
-		rtc[5] = bin2bcd(tmp->tm_mday);
-		rtc[6] = bin2bcd(tmp->tm_mon);
-		rtc[7] = bin2bcd(year);
-
-		phantom_rtc_write(RTC_BASE, rtc);
-	} else {
-		uchar reg_a;
-		if (century_flag < 0)
-			century_flag = get_century_flag();
-
-		/* lock clock registers for write */
-		reg_a = rtc_read( RTC_CONTROLA );
-		rtc_write( RTC_CONTROLA, ( reg_a | RTC_CA_WRITE ));
-
-		rtc_write( RTC_MONTH, bin2bcd( tmp->tm_mon ));
-
-		rtc_write( RTC_DAY_OF_WEEK, bin2bcd( tmp->tm_wday ));
-		rtc_write( RTC_DAY_OF_MONTH, bin2bcd( tmp->tm_mday ));
-		rtc_write( RTC_HOURS, bin2bcd( tmp->tm_hour ));
-		rtc_write( RTC_MINUTES, bin2bcd( tmp->tm_min ));
-		rtc_write( RTC_SECONDS, bin2bcd( tmp->tm_sec ));
-
-		/* break year up into century and year in century */
-		if (century_flag) {
-			rtc_write( RTC_YEAR, bin2bcd( tmp->tm_year % 100 ));
-			rtc_write( RTC_CENTURY, bin2bcd( tmp->tm_year / 100 ));
-			reg_a &= 0xc0;
-			reg_a |= bin2bcd( tmp->tm_year / 100 );
-		} else {
-			rtc_write(RTC_YEAR, bin2bcd(tmp->tm_year -
-				((tmp->tm_year < 2000) ? 1900 : 2000)));
-		}
-
-		/* unlock clock registers after read */
-		rtc_write( RTC_CONTROLA, ( reg_a  & ~RTC_CA_WRITE ));
-	}
-
-	return 0;
-}
-
-#endif
diff --git a/boards.cfg b/boards.cfg
index 52b7a48..c5fca24 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -1240,7 +1240,6 @@ Orphan  blackfin    blackfin       -           -               -
 Orphan  powerpc     mpc5xxx        -           matrix_vision   mvbc_p              MVBC_P                                MVBC_P:MVBC_P                                                                                                                     Andre Schwarz <andre.schwarz@matrix-vision.de>
 Orphan  powerpc     mpc5xxx        -           matrix_vision   mvsmr               MVSMR                                 -                                                                                                                                 Andre Schwarz <andre.schwarz@matrix-vision.de>
 Orphan  powerpc     mpc824x        -           -               hidden_dragon       HIDDEN_DRAGON                         -                                                                                                                                 Yusdi Santoso <yusdi_santoso@adaptec.com>
-Orphan  powerpc     mpc824x        -           etin            -                   debris                                -                                                                                                                                 Sangmoon Kim <dogoil@etinsys.com>
 Orphan  powerpc     mpc83xx        -           freescale       mpc8360erdk         MPC8360ERDK                           -                                                                                                                                 Anton Vorontsov <avorontsov@ru.mvista.com>
 Orphan  powerpc     mpc83xx        -           freescale       mpc8360erdk         MPC8360ERDK_33                        MPC8360ERDK:CLKIN_33MHZ                                                                                                           Anton Vorontsov <avorontsov@ru.mvista.com>
 Orphan  powerpc     mpc83xx        -           matrix_vision   mergerbox           MERGERBOX                             -                                                                                                                                 Andre Schwarz <andre.schwarz@matrix-vision.de>
diff --git a/doc/README.scrapyard b/doc/README.scrapyard
index a8312de..cbc373b 100644
--- a/doc/README.scrapyard
+++ b/doc/README.scrapyard
@@ -11,6 +11,7 @@ easily if here is something they might want to dig for...
 
 Board            Arch        CPU            Commit      Removed     Last known maintainer/contact
 =================================================================================================
+debris           powerpc     mpc824x        -           -           Sangmoon Kim <dogoil@etinsys.com>
 kvme080          powerpc     mpc824x        -           -           Sangmoon Kim <dogoil@etinsys.com>
 ep8248           powerpc     mpc8260        -           -           Yuli Barcohen <yuli@arabellasw.com>
 ispan            powerpc     mpc8260        -           -           Yuli Barcohen <yuli@arabellasw.com>
diff --git a/include/configs/debris.h b/include/configs/debris.h
deleted file mode 100644
index 4631b86..0000000
--- a/include/configs/debris.h
+++ /dev/null
@@ -1,443 +0,0 @@
-/*
- * (C) Copyright 2001, 2002
- * Sangmoon Kim, Etin Systems, dogoil@etinsys.com.
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-/* ------------------------------------------------------------------------- */
-
-/*
- * board/config.h - configuration options, board specific
- */
-
-#ifndef __CONFIG_H
-#define __CONFIG_H
-
-#define	CONFIG_SYS_TEXT_BASE	0xFFF00000
-
-/* Environments */
-
-/* bootargs */
-#define CONFIG_BOOTARGS \
-	"console=ttyS0,9600 init=/linuxrc " \
-	"root=/dev/nfs rw nfsroot=192.168.0.1:" \
-	"/tftpboot/target " \
-	"ip=192.168.0.2:192.168.0.1:192.168.0.1:" \
-	"255.255.255.0:debris:eth0:none " \
-	"mtdparts=phys:12m(root),-(kernel)"
-
-/* bootcmd */
-#define CONFIG_BOOTCOMMAND \
-	"tftp 800000 pImage; " \
-	"setenv bootargs console=ttyS0,9600 init=/linuxrc " \
-	"root=/dev/nfs rw nfsroot=${serverip}:${rootpath} " \
-	"ip=${ipaddr}:${serverip}:${gatewayip}:" \
-	"${netmask}:${hostname}:eth0:none " \
-	"mtdparts=phys:12m(root),-(kernel); " \
-	"bootm 800000"
-
-/* bootdelay */
-#define CONFIG_BOOTDELAY	5	/* autoboot 5s */
-
-/* baudrate */
-#define CONFIG_BAUDRATE		9600	/* console baudrate = 9600bps	*/
-
-/* loads_echo */
-#define CONFIG_LOADS_ECHO	0	/* echo off for serial download */
-
-/* ethaddr */
-#undef CONFIG_ETHADDR
-
-/* eth2addr */
-#undef CONFIG_ETH2ADDR
-
-/* eth3addr */
-#undef CONFIG_ETH3ADDR
-
-/* ipaddr */
-#define CONFIG_IPADDR	192.168.0.2
-
-/* serverip */
-#define CONFIG_SERVERIP	192.168.0.1
-
-/* autoload */
-#undef CONFIG_SYS_AUTOLOAD
-
-/* rootpath */
-#define CONFIG_ROOTPATH "/tftpboot/target"
-
-/* gatewayip */
-#define CONFIG_GATEWAYIP 192.168.0.1
-
-/* netmask */
-#define CONFIG_NETMASK 255.255.255.0
-
-/* hostname */
-#define CONFIG_HOSTNAME debris
-
-/* bootfile */
-#define CONFIG_BOOTFILE "pImage"
-
-/* loadaddr */
-#define CONFIG_LOADADDR 800000
-
-/* preboot */
-#undef CONFIG_PREBOOT
-
-/* clocks_in_mhz */
-#undef CONFIG_CLOCKS_IN_MHZ
-
-
-/*
- * High Level Configuration Options
- * (easy to change)
- */
-
-#define CONFIG_MPC8245		1
-#define CONFIG_DEBRIS		1
-
-#if 0
-#define USE_DINK32		1
-#else
-#undef USE_DINK32
-#endif
-
-#define CONFIG_CONS_INDEX       1
-#define CONFIG_BAUDRATE		9600
-#define CONFIG_DRAM_SPEED	100		/* MHz */
-
-
-/*
- * BOOTP options
- */
-#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
-
-
-/*
- * Command line configuration.
- */
-#include <config_cmd_default.h>
-
-#define CONFIG_CMD_ASKENV
-#define CONFIG_CMD_CACHE
-#define CONFIG_CMD_DATE
-#define CONFIG_CMD_DHCP
-#define CONFIG_CMD_DIAG
-#define CONFIG_CMD_EEPROM
-#define CONFIG_CMD_ELF
-#define CONFIG_CMD_I2C
-#define CONFIG_CMD_JFFS2
-#define CONFIG_CMD_KGDB
-#define CONFIG_CMD_PCI
-#define CONFIG_CMD_PING
-#define CONFIG_CMD_SAVES
-#define CONFIG_CMD_SDRAM
-
-
-/*
- * Miscellaneous configurable options
- */
-#define CONFIG_SYS_LONGHELP		1		/* undef to save memory		*/
-#define CONFIG_SYS_CBSIZE		256		/* Console I/O Buffer Size	*/
-#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)	/* Print Buffer Size	*/
-#define CONFIG_SYS_MAXARGS		16		/* max number of command args	*/
-#define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE	/* Boot Argument Buffer Size	*/
-#define CONFIG_SYS_LOAD_ADDR		0x00100000	/* default load address		*/
-
-/*-----------------------------------------------------------------------
- * PCI stuff
- *-----------------------------------------------------------------------
- */
-#define CONFIG_PCI				/* include pci support		*/
-#define CONFIG_PCI_INDIRECT_BRIDGE	/* indirect PCI bridge support */
-#define CONFIG_PCI_PNP
-
-#define CONFIG_EEPRO100
-#define CONFIG_SYS_RX_ETH_BUFFER	8	/* use 8 rx buffer on eepro100  */
-#define CONFIG_EEPRO100_SROM_WRITE
-
-#define PCI_ENET0_IOADDR	0x80000000
-#define PCI_ENET0_MEMADDR	0x80000000
-#define	PCI_ENET1_IOADDR	0x81000000
-#define	PCI_ENET1_MEMADDR	0x81000000
-/*-----------------------------------------------------------------------
- * Start addresses for the final memory configuration
- * (Set up by the startup code)
- * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
- */
-#define CONFIG_SYS_SDRAM_BASE		0x00000000
-#define CONFIG_SYS_MAX_RAM_SIZE	0x20000000
-#define CONFIG_VERY_BIG_RAM
-
-#define CONFIG_SYS_RESET_ADDRESS	0xFFF00100
-
-#if defined (USE_DINK32)
-#define CONFIG_SYS_MONITOR_LEN		0x00040000
-#define CONFIG_SYS_MONITOR_BASE	0x00090000
-#define CONFIG_SYS_RAMBOOT		1
-#define CONFIG_SYS_INIT_RAM_ADDR	(CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN)
-#define CONFIG_SYS_INIT_RAM_SIZE	0x10000
-#define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_OFFSET	CONFIG_SYS_GBL_DATA_OFFSET
-#else
-#undef	CONFIG_SYS_RAMBOOT
-#define CONFIG_SYS_MONITOR_LEN		0x00040000
-#define CONFIG_SYS_MONITOR_BASE	CONFIG_SYS_TEXT_BASE
-
-
-#define CONFIG_SYS_INIT_RAM_ADDR     0x40000000
-#define CONFIG_SYS_INIT_RAM_SIZE      0x1000
-#define CONFIG_SYS_GBL_DATA_OFFSET  (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-
-#endif
-
-#define CONFIG_SYS_FLASH_BASE		0x7C000000
-#define CONFIG_SYS_FLASH_SIZE		(16*1024*1024)	/* debris has tiny eeprom	*/
-
-#define CONFIG_SYS_MALLOC_LEN		(512 << 10)	/* Reserve 512 kB for malloc()	*/
-
-#define CONFIG_SYS_MEMTEST_START	0x00000000	/* memtest works on		*/
-#define CONFIG_SYS_MEMTEST_END		0x04000000	/* 0 ... 32 MB in DRAM		*/
-
-#define CONFIG_SYS_EUMB_ADDR		0xFC000000
-
-#define CONFIG_SYS_FLASH_RANGE_BASE	0xFF000000	/* flash memory address range	*/
-#define CONFIG_SYS_FLASH_RANGE_SIZE	0x01000000
-#define FLASH_BASE0_PRELIM	0x7C000000	/* debris flash		*/
-
-/*
- * JFFS2 partitions
- *
- */
-/* No command line, one static partition, whole device */
-#undef CONFIG_CMD_MTDPARTS
-#define CONFIG_JFFS2_DEV		"nor0"
-#define CONFIG_JFFS2_PART_SIZE		0xFFFFFFFF
-#define CONFIG_JFFS2_PART_OFFSET	0x00000000
-
-/* mtdparts command line support */
-
-/* Use first bank for JFFS2, second bank contains U-Boot.
- *
- * Note: fake mtd_id's used, no linux mtd map file.
- */
-/*
-#define CONFIG_CMD_MTDPARTS
-#define MTDIDS_DEFAULT		"nor0=debris-0"
-#define MTDPARTS_DEFAULT	"mtdparts=debris-0:-(jffs2)"
-*/
-
-#define CONFIG_ENV_IS_IN_NVRAM      1
-#define CONFIG_ENV_OVERWRITE     1
-#define CONFIG_SYS_NVRAM_ACCESS_ROUTINE 1
-#define CONFIG_ENV_ADDR		0xFF000000 /* right at the start of NVRAM  */
-#define CONFIG_ENV_SIZE		0x400	/* Size of the Environment - 8K	   */
-#define CONFIG_ENV_OFFSET		0	/* starting right at the beginning */
-
-#define CONFIG_SYS_NVRAM_BASE_ADDR	0xff000000
-
-/*
- * CONFIG_SYS_NVRAM_BASE_ADDR + CONFIG_SYS_NVRAM_VXWORKS_OFFS =
- * NV_RAM_ADDRS + NV_BOOT_OFFSET + NV_ENET_OFFSET
- */
-#define CONFIG_SYS_NVRAM_VXWORKS_OFFS	0x6900
-
-/*
- * select i2c support configuration
- *
- * Supported configurations are {none, software, hardware} drivers.
- * If the software driver is chosen, there are some additional
- * configuration items that the driver uses to drive the port pins.
- */
-#define CONFIG_HARD_I2C		1		/* To enable I2C support	*/
-#undef  CONFIG_SYS_I2C_SOFT			/* I2C bit-banged */
-#define CONFIG_SYS_I2C_SPEED		400000		/* I2C speed and slave address	*/
-#define CONFIG_SYS_I2C_SLAVE		0x7F
-
-#ifdef CONFIG_SYS_I2C_SOFT
-#error "Soft I2C is not configured properly.  Please review!"
-#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_SOFT_SPEED	50000
-#define CONFIG_SYS_I2C_SOFT_SLAVE	0x7F
-#define I2C_PORT		3               /* Port A=0, B=1, C=2, D=3 */
-#define I2C_ACTIVE		(iop->pdir |=  0x00010000)
-#define I2C_TRISTATE		(iop->pdir &= ~0x00010000)
-#define I2C_READ		((iop->pdat & 0x00010000) != 0)
-#define I2C_SDA(bit)		if(bit) iop->pdat |=  0x00010000; \
-				else    iop->pdat &= ~0x00010000
-#define I2C_SCL(bit)		if(bit) iop->pdat |=  0x00020000; \
-				else    iop->pdat &= ~0x00020000
-#define I2C_DELAY		udelay(5)	/* 1/4 I2C clock duration */
-#endif /* CONFIG_SYS_I2C_SOFT */
-
-#define CONFIG_SYS_I2C_EEPROM_ADDR	0x57		/* EEPROM IS24C02		*/
-#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	1		/* Bytes of address		*/
-#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	3
-#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	10	/* and takes up to 10 msec */
-
-#define CONFIG_SYS_FLASH_BANKS		{ FLASH_BASE0_PRELIM }
-
-/*-----------------------------------------------------------------------
- * Definitions for initial stack pointer and data area (in DPRAM)
- */
-
-/*
- * NS16550 Configuration
- */
-#define CONFIG_SYS_NS16550
-#define CONFIG_SYS_NS16550_SERIAL
-
-#define CONFIG_SYS_NS16550_REG_SIZE	1
-
-#define CONFIG_SYS_NS16550_CLK		7372800
-
-#define CONFIG_SYS_NS16550_COM1	0xFF080000
-#define CONFIG_SYS_NS16550_COM2	(CONFIG_SYS_NS16550_COM1 + 8)
-#define CONFIG_SYS_NS16550_COM3	(CONFIG_SYS_NS16550_COM1 + 16)
-#define CONFIG_SYS_NS16550_COM4	(CONFIG_SYS_NS16550_COM1 + 24)
-
-/*
- * Low Level Configuration Settings
- * (address mappings, register initial values, etc.)
- * You should know what you are doing if you make changes here.
- */
-
-#define CONFIG_SYS_CLK_FREQ  33333333	/* external frequency to pll */
-#define CONFIG_PLL_PCI_TO_MEM_MULTIPLIER 3
-
-#define CONFIG_SYS_DLL_EXTEND		0x00
-#define CONFIG_SYS_PCI_HOLD_DEL	0x20
-
-#define CONFIG_SYS_ROMNAL	15	/* rom/flash next access time */
-#define CONFIG_SYS_ROMFAL	31	/* rom/flash access time */
-
-#define CONFIG_SYS_REFINT	430	/* # of clocks between CBR refresh cycles */
-
-#define CONFIG_SYS_DBUS_SIZE2	1	/* set for 8-bit RCS1, clear for 32,64 */
-
-/* the following are for SDRAM only*/
-#define CONFIG_SYS_BSTOPRE	121	/* Burst To Precharge, sets open page interval */
-#define CONFIG_SYS_REFREC	8	/* Refresh to activate interval		*/
-#define CONFIG_SYS_RDLAT	4	/* data latency from read command	*/
-#define CONFIG_SYS_PRETOACT	3	/* Precharge to activate interval	*/
-#define CONFIG_SYS_ACTTOPRE	5	/* Activate to Precharge interval	*/
-#define CONFIG_SYS_ACTORW		3	/* Activate to R/W			*/
-#define CONFIG_SYS_SDMODE_CAS_LAT	3	/* SDMODE CAS latency			*/
-#define CONFIG_SYS_SDMODE_WRAP		0	/* SDMODE wrap type			*/
-#if 0
-#define CONFIG_SYS_SDMODE_BURSTLEN	2	/* OBSOLETE!  SDMODE Burst length 2=4, 3=8		*/
-#endif
-
-#define CONFIG_SYS_REGISTERD_TYPE_BUFFER   1
-#define CONFIG_SYS_EXTROM 1
-#define CONFIG_SYS_REGDIMM 0
-
-
-/* memory bank settings*/
-/*
- * only bits 20-29 are actually used from these vales to set the
- * start/end address the upper two bits will be 0, and the lower 20
- * bits will be set to 0x00000 for a start address, or 0xfffff for an
- * end address
- */
-#define CONFIG_SYS_BANK0_START		0x00000000
-#define CONFIG_SYS_BANK0_END		(0x4000000 - 1)
-#define CONFIG_SYS_BANK0_ENABLE	1
-#define CONFIG_SYS_BANK1_START		0x04000000
-#define CONFIG_SYS_BANK1_END		(0x8000000 - 1)
-#define CONFIG_SYS_BANK1_ENABLE	1
-#define CONFIG_SYS_BANK2_START		0x3ff00000
-#define CONFIG_SYS_BANK2_END		0x3fffffff
-#define CONFIG_SYS_BANK2_ENABLE	0
-#define CONFIG_SYS_BANK3_START		0x3ff00000
-#define CONFIG_SYS_BANK3_END		0x3fffffff
-#define CONFIG_SYS_BANK3_ENABLE	0
-#define CONFIG_SYS_BANK4_START		0x00000000
-#define CONFIG_SYS_BANK4_END		0x00000000
-#define CONFIG_SYS_BANK4_ENABLE	0
-#define CONFIG_SYS_BANK5_START		0x00000000
-#define CONFIG_SYS_BANK5_END		0x00000000
-#define CONFIG_SYS_BANK5_ENABLE	0
-#define CONFIG_SYS_BANK6_START		0x00000000
-#define CONFIG_SYS_BANK6_END		0x00000000
-#define CONFIG_SYS_BANK6_ENABLE	0
-#define CONFIG_SYS_BANK7_START		0x00000000
-#define CONFIG_SYS_BANK7_END		0x00000000
-#define CONFIG_SYS_BANK7_ENABLE	0
-/*
- * Memory bank enable bitmask, specifying which of the banks defined above
- are actually present. MSB is for bank #7, LSB is for bank #0.
- */
-#define CONFIG_SYS_BANK_ENABLE		0x01
-
-#define CONFIG_SYS_ODCR		0x75	/* configures line driver impedances,	*/
-					/* see 8240 book for bit definitions	*/
-#define CONFIG_SYS_PGMAX		0x32	/* how long the 8240 retains the	*/
-					/* currently accessed page in memory	*/
-					/* see 8240 book for details		*/
-
-/* SDRAM 0 - 256MB */
-#define CONFIG_SYS_IBAT0L	(CONFIG_SYS_SDRAM_BASE | BATL_PP_10 | BATL_MEMCOHERENCE)
-#define CONFIG_SYS_IBAT0U	(CONFIG_SYS_SDRAM_BASE | BATU_BL_256M | BATU_VS | BATU_VP)
-
-/* stack in DCACHE @ 1GB (no backing mem) */
-#if defined(USE_DINK32)
-#define CONFIG_SYS_IBAT1L	(0x40000000 | BATL_PP_00 )
-#define CONFIG_SYS_IBAT1U	(0x40000000 | BATU_BL_128K )
-#else
-#define CONFIG_SYS_IBAT1L	(CONFIG_SYS_INIT_RAM_ADDR | BATL_PP_10 | BATL_MEMCOHERENCE)
-#define CONFIG_SYS_IBAT1U	(CONFIG_SYS_INIT_RAM_ADDR | BATU_BL_128K | BATU_VS | BATU_VP)
-#endif
-
-/* PCI memory */
-#define CONFIG_SYS_IBAT2L	(0x80000000 | BATL_PP_10 | BATL_CACHEINHIBIT)
-#define CONFIG_SYS_IBAT2U	(0x80000000 | BATU_BL_256M | BATU_VS | BATU_VP)
-
-/* Flash, config addrs, etc */
-#define CONFIG_SYS_IBAT3L	(0xF0000000 | BATL_PP_10 | BATL_CACHEINHIBIT)
-#define CONFIG_SYS_IBAT3U	(0xF0000000 | BATU_BL_256M | BATU_VS | BATU_VP)
-
-#define CONFIG_SYS_DBAT0L	CONFIG_SYS_IBAT0L
-#define CONFIG_SYS_DBAT0U	CONFIG_SYS_IBAT0U
-#define CONFIG_SYS_DBAT1L	CONFIG_SYS_IBAT1L
-#define CONFIG_SYS_DBAT1U	CONFIG_SYS_IBAT1U
-#define CONFIG_SYS_DBAT2L	CONFIG_SYS_IBAT2L
-#define CONFIG_SYS_DBAT2U	CONFIG_SYS_IBAT2U
-#define CONFIG_SYS_DBAT3L	CONFIG_SYS_IBAT3L
-#define CONFIG_SYS_DBAT3U	CONFIG_SYS_IBAT3U
-
-/*
- * For booting Linux, the board info and command line data
- * have to be in the first 8 MB of memory, since this is
- * the maximum mapped by the Linux kernel during initialization.
- */
-#define CONFIG_SYS_BOOTMAPSZ		(8 << 20)	/* Initial Memory map for Linux */
-/*-----------------------------------------------------------------------
- * FLASH organization
- */
-#define CONFIG_SYS_MAX_FLASH_BANKS	1	/* max number of memory banks		*/
-#define CONFIG_SYS_MAX_FLASH_SECT	256	/* max number of sectors on one chip	*/
-
-#define CONFIG_SYS_FLASH_ERASE_TOUT	120000	/* Timeout for Flash Erase (in ms)	*/
-#define CONFIG_SYS_FLASH_WRITE_TOUT	500	/* Timeout for Flash Write (in ms)	*/
-
-/*-----------------------------------------------------------------------
- * Cache Configuration
- */
-#define CONFIG_SYS_CACHELINE_SIZE	32	/* For MPC8240 CPU			*/
-#if defined(CONFIG_CMD_KGDB)
-#  define CONFIG_SYS_CACHELINE_SHIFT	5	/* log base 2 of the above value */
-#endif
-
-/* values according to the manual */
-
-#define CONFIG_DRAM_50MHZ	1
-#define CONFIG_SDRAM_50MHZ
-
-#define CONFIG_DISK_SPINUP_TIME 1000000
-
-#endif	/* __CONFIG_H */