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authorDaniel Hellstrom <daniel@gaisler.com>2014-05-08 19:16:14 +0200
committerDaniel Hellstrom <daniel@gaisler.com>2014-05-08 21:05:29 +0200
commit1c1c7506de1051df6d81c51a06a57be6406b534c (patch)
tree059cce9a62e98f2f8479327b58d8a5ef5b513e22
parent09865465821fd35eabedcd9f102f1d576c626ad8 (diff)
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leon: use CONFIG_SYS_HZ to config timer prescaler
Before it was hardcoded to 1000 ticks per second. Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>
-rw-r--r--arch/sparc/cpu/leon2/cpu_init.c17
-rw-r--r--arch/sparc/cpu/leon3/cpu_init.c17
2 files changed, 18 insertions, 16 deletions
diff --git a/arch/sparc/cpu/leon2/cpu_init.c b/arch/sparc/cpu/leon2/cpu_init.c
index de310fb..04d9158 100644
--- a/arch/sparc/cpu/leon2/cpu_init.c
+++ b/arch/sparc/cpu/leon2/cpu_init.c
@@ -13,6 +13,9 @@
#include <config.h>
+#define TIMER_BASE_CLK 1000000
+#define US_PER_TICK (1000000 / CONFIG_SYS_HZ)
+
DECLARE_GLOBAL_DATA_PTR;
/* reset CPU (jump to 0, without reset) */
@@ -90,7 +93,7 @@ void cpu_wait_ticks(unsigned long ticks)
while (get_timer(start) < ticks) ;
}
-/* initiate and setup timer0 interrupt to 1MHz
+/* initiate and setup timer0 interrupt to configured HZ. Base clock is 1MHz.
* Return irq number for timer int or a negative number for
* dealing with self
*/
@@ -98,9 +101,9 @@ int timer_interrupt_init_cpu(void)
{
LEON2_regs *leon2 = (LEON2_regs *) LEON2_PREGS;
- /* 1ms ticks */
+ /* SYS_HZ ticks per second */
leon2->Timer_Counter_1 = 0;
- leon2->Timer_Reload_1 = 999; /* (((1000000 / 100) - 1)) */
+ leon2->Timer_Reload_1 = (TIMER_BASE_CLK / CONFIG_SYS_HZ) - 1;
leon2->Timer_Control_1 =
(LEON2_TIMER_CTRL_EN | LEON2_TIMER_CTRL_RS | LEON2_TIMER_CTRL_LD);
@@ -112,14 +115,12 @@ int timer_interrupt_init_cpu(void)
*/
unsigned long cpu_usec2ticks(unsigned long usec)
{
- /* timer set to 1kHz ==> 1 clk tick = 1 msec */
- if (usec < 1000)
+ if (usec < US_PER_TICK)
return 1;
- return (usec / 1000);
+ return usec / US_PER_TICK;
}
unsigned long cpu_ticks2usec(unsigned long ticks)
{
- /* 1tick = 1usec */
- return ticks * 1000;
+ return ticks * US_PER_TICK;
}
diff --git a/arch/sparc/cpu/leon3/cpu_init.c b/arch/sparc/cpu/leon3/cpu_init.c
index 4720f42..57ffa96 100644
--- a/arch/sparc/cpu/leon3/cpu_init.c
+++ b/arch/sparc/cpu/leon3/cpu_init.c
@@ -14,6 +14,9 @@
#include <config.h>
+#define TIMER_BASE_CLK 1000000
+#define US_PER_TICK (1000000 / CONFIG_SYS_HZ)
+
DECLARE_GLOBAL_DATA_PTR;
/* reset CPU (jump to 0, without reset) */
@@ -203,15 +206,15 @@ void cpu_wait_ticks(unsigned long ticks)
while (get_timer(start) < ticks) ;
}
-/* initiate and setup timer0 interrupt to 1MHz
+/* initiate and setup timer0 interrupt to configured HZ. Base clock is 1MHz.
* Return irq number for timer int or a negative number for
* dealing with self
*/
int timer_interrupt_init_cpu(void)
{
- /* 1ms ticks */
+ /* SYS_HZ ticks per second */
gptimer->e[0].val = 0;
- gptimer->e[0].rld = 999; /* (((1000000 / 100) - 1)) */
+ gptimer->e[0].rld = (TIMER_BASE_CLK / CONFIG_SYS_HZ) - 1;
gptimer->e[0].ctrl =
(LEON3_GPTIMER_EN |
LEON3_GPTIMER_RL | LEON3_GPTIMER_LD | LEON3_GPTIMER_IRQEN);
@@ -224,14 +227,12 @@ int timer_interrupt_init_cpu(void)
*/
unsigned long cpu_usec2ticks(unsigned long usec)
{
- /* timer set to 1kHz ==> 1 clk tick = 1 msec */
- if (usec < 1000)
+ if (usec < US_PER_TICK)
return 1;
- return (usec / 1000);
+ return usec / US_PER_TICK;
}
unsigned long cpu_ticks2usec(unsigned long ticks)
{
- /* 1tick = 1usec */
- return ticks * 1000;
+ return ticks * US_PER_TICK;
}