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| author | Wolfgang Denk <wd@denx.de> | 2012-04-09 21:34:27 +0200 |
|---|---|---|
| committer | Wolfgang Denk <wd@denx.de> | 2012-04-09 21:34:27 +0200 |
| commit | 3f0675d1a532dbf1fd906103e4b61a6fb842c257 (patch) | |
| tree | fd4f11a24b602a83c47352a1a392976e6c8b6c3d | |
| parent | 2c734cd932b53b46e9f89e4f5db9360afc459ae6 (diff) | |
| parent | f4cdde40195078a9183a0e29f741dac31ea3d425 (diff) | |
| download | u-boot-imx-3f0675d1a532dbf1fd906103e4b61a6fb842c257.zip u-boot-imx-3f0675d1a532dbf1fd906103e4b61a6fb842c257.tar.gz u-boot-imx-3f0675d1a532dbf1fd906103e4b61a6fb842c257.tar.bz2 | |
Merge branch 'marek.vasut@gmail.com' of git://git.denx.de/u-boot-staging
* 'marek.vasut@gmail.com' of git://git.denx.de/u-boot-staging:
LMB: Fix undefined lmb_reserve() on non-lmb platforms
MIPS: fix endianess handling
MIPS: fix inconsistency in config option for cache operation mode
MIPS: board.c: fix init of flash data in bd_info
| -rw-r--r-- | README | 6 | ||||
| -rw-r--r-- | arch/mips/cpu/mips32/cache.S | 6 | ||||
| -rw-r--r-- | arch/mips/cpu/mips32/config.mk | 21 | ||||
| -rw-r--r-- | arch/mips/lib/board.c | 8 | ||||
| -rw-r--r-- | boards.cfg | 2 | ||||
| -rw-r--r-- | include/configs/pb1x00.h | 2 |
6 files changed, 35 insertions, 10 deletions
@@ -374,6 +374,12 @@ The following options need to be configured: Defines the string to utilize when trying to match PCIe device tree nodes for the given platform. +- Generic CPU options: + CONFIG_SYS_BIG_ENDIAN, CONFIG_SYS_LITTLE_ENDIAN + + Defines the endianess of the CPU. Implementation of those + values is arch specific. + - Intel Monahans options: CONFIG_SYS_MONAHANS_RUN_MODE_OSC_RATIO diff --git a/arch/mips/cpu/mips32/cache.S b/arch/mips/cpu/mips32/cache.S index 5ce0ec4..e683e8b 100644 --- a/arch/mips/cpu/mips32/cache.S +++ b/arch/mips/cpu/mips32/cache.S @@ -30,6 +30,10 @@ #include <asm/addrspace.h> #include <asm/cacheops.h> +#ifndef CONFIG_SYS_MIPS_CACHE_MODE +#define CONFIG_SYS_MIPS_CACHE_MODE CONF_CM_CACHABLE_NONCOHERENT +#endif + #define RA t8 /* @@ -224,7 +228,7 @@ LEAF(dcache_enable) mfc0 t0, CP0_CONFIG ori t0, CONF_CM_CMASK xori t0, CONF_CM_CMASK - ori t0, CONF_CM_CACHABLE_NONCOHERENT + ori t0, CONFIG_SYS_MIPS_CACHE_MODE mtc0 t0, CP0_CONFIG jr ra END(dcache_enable) diff --git a/arch/mips/cpu/mips32/config.mk b/arch/mips/cpu/mips32/config.mk index 4d1b273..a1cd590 100644 --- a/arch/mips/cpu/mips32/config.mk +++ b/arch/mips/cpu/mips32/config.mk @@ -27,14 +27,23 @@ # Note: Toolchains with binutils prior to v2.16 # are no longer supported by U-Boot MIPS tree! # -MIPSFLAGS = -march=mips32r2 +MIPSFLAGS := -march=mips32r2 +# Handle special prefix in ELDK 4.0 toolchain ifneq (,$(findstring 4KCle,$(CROSS_COMPILE))) -ENDIANNESS = -EL -else -ENDIANNESS = -EB +ENDIANNESS := -EL endif -MIPSFLAGS += $(ENDIANNESS) +ifdef CONFIG_SYS_LITTLE_ENDIAN +ENDIANNESS := -EL +endif + +ifdef CONFIG_SYS_BIG_ENDIAN +ENDIANNESS := -EB +endif + +# Default to EB if no endianess is configured +ENDIANNESS ?= -EB -PLATFORM_CPPFLAGS += $(MIPSFLAGS) +PLATFORM_CPPFLAGS += $(MIPSFLAGS) $(ENDIANNESS) +PLATFORM_LDFLAGS += $(ENDIANNESS) diff --git a/arch/mips/lib/board.c b/arch/mips/lib/board.c index d998f0e..38e6e77 100644 --- a/arch/mips/lib/board.c +++ b/arch/mips/lib/board.c @@ -294,15 +294,19 @@ void board_init_r(gd_t *id, ulong dest_addr) /* configure available FLASH banks */ size = flash_init(); display_flash_config(size); + bd->bi_flashstart = CONFIG_SYS_FLASH_BASE; bd->bi_flashsize = size; -#endif - bd->bi_flashstart = CONFIG_SYS_FLASH_BASE; #if CONFIG_SYS_MONITOR_BASE == CONFIG_SYS_FLASH_BASE bd->bi_flashoffset = monitor_flash_len; /* reserved area for U-Boot */ #else bd->bi_flashoffset = 0; #endif +#else + bd->bi_flashstart = 0; + bd->bi_flashsize = 0; + bd->bi_flashoffset = 0; +#endif #ifdef CONFIG_CMD_NAND puts("NAND: "); @@ -360,7 +360,7 @@ dbau1000 mips mips32 dbau1x00 - dbau1100 mips mips32 dbau1x00 - au1x00 dbau1x00:DBAU1100 dbau1500 mips mips32 dbau1x00 - au1x00 dbau1x00:DBAU1500 dbau1550 mips mips32 dbau1x00 - au1x00 dbau1x00:DBAU1550 -dbau1550_el mips mips32 dbau1x00 - au1x00 dbau1x00:DBAU1550 +dbau1550_el mips mips32 dbau1x00 - au1x00 dbau1x00:DBAU1550,SYS_LITTLE_ENDIAN gth2 mips mips32 - - au1x00 pb1000 mips mips32 pb1x00 - au1x00 pb1x00:PB1000 incaip mips mips32 incaip - incaip diff --git a/include/configs/pb1x00.h b/include/configs/pb1x00.h index eea8ed3..d056884 100644 --- a/include/configs/pb1x00.h +++ b/include/configs/pb1x00.h @@ -46,6 +46,8 @@ #endif #endif +#define CONFIG_SYS_LITTLE_ENDIAN + #define CONFIG_ETHADDR DE:AD:BE:EF:01:01 /* Ethernet address */ #define CONFIG_BOOTDELAY 2 /* autoboot after 2 seconds */ |