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| author | Marek Vasut <marek.vasut@gmail.com> | 2011-11-26 12:04:11 +0100 |
|---|---|---|
| committer | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2011-12-06 23:59:32 +0100 |
| commit | 00d5ec937d4ba782c034d0c31bcd1b0055fdf441 (patch) | |
| tree | 742b4796d83894d1b90ca92faa41d5ba6f521139 | |
| parent | 7f4cfcf40d04b03091400c85fd4815335feec401 (diff) | |
| download | u-boot-imx-00d5ec937d4ba782c034d0c31bcd1b0055fdf441.zip u-boot-imx-00d5ec937d4ba782c034d0c31bcd1b0055fdf441.tar.gz u-boot-imx-00d5ec937d4ba782c034d0c31bcd1b0055fdf441.tar.bz2 | |
PXA: Fixup PXA25x boards after start.S update
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
| -rw-r--r-- | include/configs/lubbock.h | 2 | ||||
| -rw-r--r-- | include/configs/palmtc.h | 2 | ||||
| -rw-r--r-- | include/configs/pxa255_idp.h | 2 | ||||
| -rw-r--r-- | include/configs/xaeniax.h | 2 |
4 files changed, 4 insertions, 4 deletions
diff --git a/include/configs/lubbock.h b/include/configs/lubbock.h index 90c5bf8..07bc895 100644 --- a/include/configs/lubbock.h +++ b/include/configs/lubbock.h @@ -175,7 +175,7 @@ #define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 -#define CONFIG_SYS_INIT_SP_ADDR (GENERATED_GBL_DATA_SIZE + PHYS_SDRAM_1) +#define CONFIG_SYS_INIT_SP_ADDR 0xfffff800 #define FPGA_REGS_BASE_PHYSICAL 0x08000000 diff --git a/include/configs/palmtc.h b/include/configs/palmtc.h index bdb5f57..026e183 100644 --- a/include/configs/palmtc.h +++ b/include/configs/palmtc.h @@ -157,7 +157,7 @@ #define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_DRAM_BASE #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 -#define CONFIG_SYS_INIT_SP_ADDR (GENERATED_GBL_DATA_SIZE + PHYS_SDRAM_1) +#define CONFIG_SYS_INIT_SP_ADDR 0xfffff800 /* * NOR FLASH diff --git a/include/configs/pxa255_idp.h b/include/configs/pxa255_idp.h index 620d270..c208a25 100644 --- a/include/configs/pxa255_idp.h +++ b/include/configs/pxa255_idp.h @@ -291,7 +291,7 @@ #define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 -#define CONFIG_SYS_INIT_SP_ADDR (GENERATED_GBL_DATA_SIZE + PHYS_SDRAM_1) +#define CONFIG_SYS_INIT_SP_ADDR 0xfffff800 /* * GPIO settings diff --git a/include/configs/xaeniax.h b/include/configs/xaeniax.h index 6dce8ae..5c59ac7 100644 --- a/include/configs/xaeniax.h +++ b/include/configs/xaeniax.h @@ -168,7 +168,7 @@ #define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 -#define CONFIG_SYS_INIT_SP_ADDR (GENERATED_GBL_DATA_SIZE + PHYS_SDRAM_1) +#define CONFIG_SYS_INIT_SP_ADDR 0xfffff800 /* * FLASH and environment organization |