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| author | York Sun <yorksun@freescale.com> | 2013-03-25 07:39:35 +0000 |
|---|---|---|
| committer | Andy Fleming <afleming@freescale.com> | 2013-05-14 16:13:25 -0500 |
| commit | ef00227551273eb1acca299bcb9528e1a2071328 (patch) | |
| tree | bb4188f99939b5478ba0f877dc376999f714c962 | |
| parent | 8444b536c99592d61a8374641006431f749253df (diff) | |
| download | u-boot-imx-ef00227551273eb1acca299bcb9528e1a2071328.zip u-boot-imx-ef00227551273eb1acca299bcb9528e1a2071328.tar.gz u-boot-imx-ef00227551273eb1acca299bcb9528e1a2071328.tar.bz2 | |
powerpc/mpc8xxx: Allow board file to override DDR address assignment
This gives boards flexibility to assign other than default addresses to each
DDR controller. For example, DDR controler 2 can have 0 as the base and DDR
controller 1 has higher memory.
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
| -rw-r--r-- | arch/powerpc/cpu/mpc8xxx/ddr/main.c | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/arch/powerpc/cpu/mpc8xxx/ddr/main.c b/arch/powerpc/cpu/mpc8xxx/ddr/main.c index 1a8d593..7a8636d 100644 --- a/arch/powerpc/cpu/mpc8xxx/ddr/main.c +++ b/arch/powerpc/cpu/mpc8xxx/ddr/main.c @@ -186,7 +186,7 @@ const char * step_to_string(unsigned int step) { return step_string_tbl[s]; } -unsigned long long step_assign_addresses(fsl_ddr_info_t *pinfo, +static unsigned long long __step_assign_addresses(fsl_ddr_info_t *pinfo, unsigned int dbw_cap_adj[]) { int i, j; @@ -354,6 +354,11 @@ unsigned long long step_assign_addresses(fsl_ddr_info_t *pinfo, return total_mem; } +/* Use weak function to allow board file to override the address assignment */ +__attribute__((weak, alias("__step_assign_addresses"))) +unsigned long long step_assign_addresses(fsl_ddr_info_t *pinfo, + unsigned int dbw_cap_adj[]); + unsigned long long fsl_ddr_compute(fsl_ddr_info_t *pinfo, unsigned int start_step, unsigned int size_only) |