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authorSRICHARAN R <r.sricharan@ti.com>2012-03-12 02:25:43 +0000
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>2012-05-15 08:31:24 +0200
commitc1fa3c37af7b99ba80f232a84f6b84e90f481f06 (patch)
treeb780b18e75564ebf674abbddd91aad4d308724c8
parent002a2c0c66d2e1757b89ad6824b4a472dcef1076 (diff)
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OMAP4/5: device: Add support to get the device type.
Add support to identify the device as GP/EMU/HS. Signed-off-by: R Sricharan <r.sricharan@ti.com>
-rw-r--r--arch/arm/cpu/armv7/omap-common/hwinit-common.c6
-rw-r--r--arch/arm/include/asm/arch-omap4/omap.h4
-rw-r--r--arch/arm/include/asm/arch-omap5/omap.h4
3 files changed, 13 insertions, 1 deletions
diff --git a/arch/arm/cpu/armv7/omap-common/hwinit-common.c b/arch/arm/cpu/armv7/omap-common/hwinit-common.c
index ab46bff..10e7669 100644
--- a/arch/arm/cpu/armv7/omap-common/hwinit-common.c
+++ b/arch/arm/cpu/armv7/omap-common/hwinit-common.c
@@ -217,7 +217,11 @@ int arch_cpu_init(void)
*/
u32 get_device_type(void)
{
- return 0;
+ struct omap_sys_ctrl_regs *ctrl =
+ (struct omap_sys_ctrl_regs *) SYSCTRL_GENERAL_CORE_BASE;
+
+ return (readl(&ctrl->control_status) &
+ (DEVICE_TYPE_MASK)) >> DEVICE_TYPE_SHIFT;
}
/*
diff --git a/arch/arm/include/asm/arch-omap4/omap.h b/arch/arm/include/asm/arch-omap4/omap.h
index 5fd692f..3a39787 100644
--- a/arch/arm/include/asm/arch-omap4/omap.h
+++ b/arch/arm/include/asm/arch-omap4/omap.h
@@ -139,6 +139,10 @@ struct s32ktimer {
unsigned int s32k_cr; /* 0x10 */
};
+#define DEVICE_TYPE_SHIFT (0x8)
+#define DEVICE_TYPE_MASK (0x7 << DEVICE_TYPE_SHIFT)
+#define DEVICE_GP 0x3
+
struct omap_sys_ctrl_regs {
unsigned int pad1[129];
unsigned int control_id_code; /* 0x4A002204 */
diff --git a/arch/arm/include/asm/arch-omap5/omap.h b/arch/arm/include/asm/arch-omap5/omap.h
index 7e17c76..2725392 100644
--- a/arch/arm/include/asm/arch-omap5/omap.h
+++ b/arch/arm/include/asm/arch-omap5/omap.h
@@ -136,6 +136,10 @@ struct s32ktimer {
unsigned int s32k_cr; /* 0x10 */
};
+#define DEVICE_TYPE_SHIFT 0x6
+#define DEVICE_TYPE_MASK (0x7 << DEVICE_TYPE_SHIFT)
+#define DEVICE_GP 0x3
+
struct omap_sys_ctrl_regs {
u32 pad0[77]; /* 0x4A002000 */
u32 control_status; /* 0x4A002134 */