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| author | Stefan Roese <sr@denx.de> | 2009-12-08 09:10:04 +0100 |
|---|---|---|
| committer | Kim Phillips <kim.phillips@freescale.com> | 2010-01-07 18:34:30 -0600 |
| commit | 7693640acd5222f5a64e59ccf5e3bc511e8054b9 (patch) | |
| tree | 573d27601746fa3c6d0c5bdfd0f92857caef3255 | |
| parent | 2e95004deb6e33e33bf1b8a92a38cd2115bac4c2 (diff) | |
| download | u-boot-imx-7693640acd5222f5a64e59ccf5e3bc511e8054b9.zip u-boot-imx-7693640acd5222f5a64e59ccf5e3bc511e8054b9.tar.gz u-boot-imx-7693640acd5222f5a64e59ccf5e3bc511e8054b9.tar.bz2 | |
mpc83xx: spd_sdram.c: Disable memory controller before initializing
The memory controller could already be enabled, when spd_sdram() is
called. This could be the case for example, when the SDRAM is initialized
by the JTAG debugger.
The "sync" after the register access via the accessor function is
still needed, because the macro uses the sync before the real write
is done. So until not all accesses are converted to using accessor
functions, this sync still needs to be made "manually" here.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Reinhard Arlt <reinhard.arlt@esd.eu>
Acked-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| -rw-r--r-- | cpu/mpc83xx/spd_sdram.c | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/cpu/mpc83xx/spd_sdram.c b/cpu/mpc83xx/spd_sdram.c index 0f61180..44aaa9a 100644 --- a/cpu/mpc83xx/spd_sdram.c +++ b/cpu/mpc83xx/spd_sdram.c @@ -29,6 +29,7 @@ #include <common.h> #include <asm/processor.h> +#include <asm/io.h> #include <i2c.h> #include <spd.h> #include <asm/mmu.h> @@ -150,6 +151,14 @@ long int spd_sdram() unsigned int ddrc_ecc_enable; unsigned int pvr = get_pvr(); + /* + * First disable the memory controller (could be enabled + * by the debugger) + */ + clrsetbits_be32(&ddr->sdram_cfg, SDRAM_CFG_MEM_EN, 0); + sync(); + isync(); + /* Read SPD parameters with I2C */ CONFIG_SYS_READ_SPD(SPD_EEPROM_ADDRESS, 0, 1, (uchar *) & spd, sizeof (spd)); #ifdef SPD_DEBUG |