diff options
author | Chin Liang See <clsee@altera.com> | 2013-09-11 11:24:48 -0500 |
---|---|---|
committer | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2013-10-07 19:32:21 +0200 |
commit | 5d649d2b089836f118fcd5a008c5f9d1f5a83e4f (patch) | |
tree | ea84462038f31a142e51d9f61911fd1105803170 | |
parent | 0610a16cf263d0023b4e3de1f1710906992a91b6 (diff) | |
download | u-boot-imx-5d649d2b089836f118fcd5a008c5f9d1f5a83e4f.zip u-boot-imx-5d649d2b089836f118fcd5a008c5f9d1f5a83e4f.tar.gz u-boot-imx-5d649d2b089836f118fcd5a008c5f9d1f5a83e4f.tar.bz2 |
socfpga: Adding System Manager driver
Adding System Manager driver which will configure the
pin mux for real hardware Cyclone V development kit
(not Virtual Platform)
Signed-off-by: Chin Liang See <clsee@altera.com>
Reviewed-by: Pavel Machek <pavel@denx.de>
Acked-by: Dinh Nguyen <dinguyen@altera.com>
Cc: Wolfgang Denk <wd@denx.de>
CC: Pavel Machek <pavel@denx.de>
Cc: Dinh Nguyen <dinguyen@altera.com>
Cc: Tom Rini <trini@ti.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
-rw-r--r-- | arch/arm/cpu/armv7/socfpga/Makefile | 2 | ||||
-rw-r--r-- | arch/arm/cpu/armv7/socfpga/spl.c | 6 | ||||
-rw-r--r-- | arch/arm/cpu/armv7/socfpga/system_manager.c | 27 | ||||
-rw-r--r-- | arch/arm/include/asm/arch-socfpga/socfpga_base_addrs.h | 1 | ||||
-rw-r--r-- | arch/arm/include/asm/arch-socfpga/system_manager.h | 22 | ||||
-rw-r--r-- | board/altera/socfpga/Makefile | 4 | ||||
-rw-r--r-- | include/configs/socfpga_cyclone5.h | 1 |
7 files changed, 61 insertions, 2 deletions
diff --git a/arch/arm/cpu/armv7/socfpga/Makefile b/arch/arm/cpu/armv7/socfpga/Makefile index 5024fc5..0859e44 100644 --- a/arch/arm/cpu/armv7/socfpga/Makefile +++ b/arch/arm/cpu/armv7/socfpga/Makefile @@ -13,7 +13,7 @@ include $(TOPDIR)/config.mk LIB = $(obj)lib$(SOC).o SOBJS := lowlevel_init.o -COBJS-y := misc.o timer.o reset_manager.o +COBJS-y := misc.o timer.o reset_manager.o system_manager.o COBJS-$(CONFIG_SPL_BUILD) += spl.o COBJS := $(COBJS-y) diff --git a/arch/arm/cpu/armv7/socfpga/spl.c b/arch/arm/cpu/armv7/socfpga/spl.c index 2b9be28..74bceab 100644 --- a/arch/arm/cpu/armv7/socfpga/spl.c +++ b/arch/arm/cpu/armv7/socfpga/spl.c @@ -12,6 +12,7 @@ #include <image.h> #include <asm/arch/reset_manager.h> #include <spl.h> +#include <asm/arch/system_manager.h> DECLARE_GLOBAL_DATA_PTR; @@ -25,6 +26,11 @@ u32 spl_boot_device(void) */ void spl_board_init(void) { +#ifndef CONFIG_SOCFPGA_VIRTUAL_TARGET + /* configure the pin muxing through system manager */ + sysmgr_pinmux_init(); +#endif /* CONFIG_SOCFPGA_VIRTUAL_TARGET */ + /* de-assert reset for peripherals and bridges based on handoff */ reset_deassert_peripherals_handoff(); diff --git a/arch/arm/cpu/armv7/socfpga/system_manager.c b/arch/arm/cpu/armv7/socfpga/system_manager.c new file mode 100644 index 0000000..d96521b --- /dev/null +++ b/arch/arm/cpu/armv7/socfpga/system_manager.c @@ -0,0 +1,27 @@ +/* + * Copyright (C) 2013 Altera Corporation <www.altera.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <asm/io.h> +#include <asm/arch/system_manager.h> + +DECLARE_GLOBAL_DATA_PTR; + +/* + * Configure all the pin muxes + */ +void sysmgr_pinmux_init(void) +{ + unsigned long offset = CONFIG_SYSMGR_PINMUXGRP_OFFSET; + + const unsigned long *pval = sys_mgr_init_table; + unsigned long i; + + for (i = 0; i < ARRAY_SIZE(sys_mgr_init_table); + i++, offset += sizeof(unsigned long)) { + writel(*pval++, (SOCFPGA_SYSMGR_ADDRESS + offset)); + } +} diff --git a/arch/arm/include/asm/arch-socfpga/socfpga_base_addrs.h b/arch/arm/include/asm/arch-socfpga/socfpga_base_addrs.h index 1182a13..50c4ebd 100644 --- a/arch/arm/include/asm/arch-socfpga/socfpga_base_addrs.h +++ b/arch/arm/include/asm/arch-socfpga/socfpga_base_addrs.h @@ -12,5 +12,6 @@ #define SOCFPGA_UART1_ADDRESS 0xffc03000 #define SOCFPGA_OSC1TIMER0_ADDRESS 0xffd00000 #define SOCFPGA_RSTMGR_ADDRESS 0xffd05000 +#define SOCFPGA_SYSMGR_ADDRESS 0xffd08000 #endif /* _SOCFPGA_BASE_ADDRS_H_ */ diff --git a/arch/arm/include/asm/arch-socfpga/system_manager.h b/arch/arm/include/asm/arch-socfpga/system_manager.h new file mode 100644 index 0000000..d965d25 --- /dev/null +++ b/arch/arm/include/asm/arch-socfpga/system_manager.h @@ -0,0 +1,22 @@ +/* + * Copyright (C) 2013 Altera Corporation <www.altera.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef _SYSTEM_MANAGER_H_ +#define _SYSTEM_MANAGER_H_ + +#ifndef __ASSEMBLY__ + +void sysmgr_pinmux_init(void); + +/* declaration for handoff table type */ +extern unsigned long sys_mgr_init_table[CONFIG_HPS_PINMUX_NUM]; + +#endif + + +#define CONFIG_SYSMGR_PINMUXGRP_OFFSET (0x400) + +#endif /* _SYSTEM_MANAGER_H_ */ diff --git a/board/altera/socfpga/Makefile b/board/altera/socfpga/Makefile index 101fc7c..9dc45a9 100644 --- a/board/altera/socfpga/Makefile +++ b/board/altera/socfpga/Makefile @@ -10,8 +10,10 @@ include $(TOPDIR)/config.mk LIB = $(obj)lib$(BOARD).o -COBJS := socfpga_cyclone5.o +COBJS-y := socfpga_cyclone5.o +COBJS-$(CONFIG_SPL_BUILD) += pinmux_config.o +COBJS := $(COBJS-y) SRCS := $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(COBJS)) diff --git a/include/configs/socfpga_cyclone5.h b/include/configs/socfpga_cyclone5.h index 06aeba6..346ca72 100644 --- a/include/configs/socfpga_cyclone5.h +++ b/include/configs/socfpga_cyclone5.h @@ -7,6 +7,7 @@ #define __CONFIG_H #include <asm/arch/socfpga_base_addrs.h> +#include "../../board/altera/socfpga/pinmux_config.h" /* * High level configuration |