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| author | Haijun.Zhang <Haijun.Zhang@freescale.com> | 2014-01-10 13:52:17 +0800 |
|---|---|---|
| committer | York Sun <yorksun@freescale.com> | 2014-01-22 08:56:15 -0800 |
| commit | f7e27cc5ee13aebce4e81fcf908d22d2d55d61e0 (patch) | |
| tree | a654fcf4971cfb7ec31138e5e1c9db15a68c17b2 | |
| parent | e222b1f36fedb0363dbc21e0add7dc3848bae553 (diff) | |
| download | u-boot-imx-f7e27cc5ee13aebce4e81fcf908d22d2d55d61e0.zip u-boot-imx-f7e27cc5ee13aebce4e81fcf908d22d2d55d61e0.tar.gz u-boot-imx-f7e27cc5ee13aebce4e81fcf908d22d2d55d61e0.tar.bz2 | |
esdhc: Workaround for card can't be detected on T4240QDS
Card detection pin is ineffective on T4240QDS Rev1.0.
There are two cards can be connected to board.
1. eMMC card is built-in board, can not be removed. so
For eMMC card it is always there.
2. Card detecting pin is functional for SDHC card in Rev2.0.
This workaround force sdhc driver scan and initialize the card
regardless of whether the card is inserted or not in case Rev1.0.
Signed-off-by: Haijun Zhang <Haijun.Zhang@freescale.com>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
Reviewed-by: York Sun <yorksun@freescale.com>
| -rw-r--r-- | drivers/mmc/fsl_esdhc.c | 4 | ||||
| -rw-r--r-- | include/configs/T4240QDS.h | 5 |
2 files changed, 9 insertions, 0 deletions
diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c index e3cd0c7..f79f167 100644 --- a/drivers/mmc/fsl_esdhc.c +++ b/drivers/mmc/fsl_esdhc.c @@ -500,6 +500,10 @@ static int esdhc_getcd(struct mmc *mmc) struct fsl_esdhc *regs = (struct fsl_esdhc *)cfg->esdhc_base; int timeout = 1000; +#ifdef CONFIG_ESDHC_DETECT_QUIRK + if (CONFIG_ESDHC_DETECT_QUIRK) + return 1; +#endif while (!(esdhc_read32(®s->prsstat) & PRSSTAT_CINS) && --timeout) udelay(1000); diff --git a/include/configs/T4240QDS.h b/include/configs/T4240QDS.h index 22019dc..5b1ed63 100644 --- a/include/configs/T4240QDS.h +++ b/include/configs/T4240QDS.h @@ -165,6 +165,8 @@ unsigned long get_board_ddr_clk(void); #define QIXIS_RCFG_CTL_RECONFIG_IDLE 0x20 #define QIXIS_RCFG_CTL_RECONFIG_START 0x21 #define QIXIS_RCFG_CTL_WATCHDOG_ENBLE 0x08 +#define QIXIS_BRDCFG5 0x55 +#define QIXIS_MUX_SDHC 2 #define QIXIS_BASE_PHYS (0xf00000000ull | QIXIS_BASE) #define CONFIG_SYS_CSPR3_EXT (0xf) @@ -466,6 +468,9 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_CMD_FAT #define CONFIG_DOS_PARTITION #define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33 +#define CONFIG_ESDHC_DETECT_QUIRK \ + (!(readb(QIXIS_BASE + QIXIS_BRDCFG5) & QIXIS_MUX_SDHC) || \ + IS_SVR_REV(get_svr(), 1, 0)) #endif #define CONFIG_BOOTDELAY 10 /* -1 disables auto-boot */ |