summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorRajeshwari Shinde <rajeshwari.s@samsung.com>2013-02-19 02:19:45 +0000
committerHeiko Schocher <hs@denx.de>2013-03-12 19:33:11 +0100
commitcb466c056a878dcae27b76eb86a124e0c5203e7a (patch)
tree170a868397daac1a83e3dc72a85452e94fe24bd7
parentcecf3c006f88a45c2fbab4336f01ebeb05e2ef2e (diff)
downloadu-boot-imx-cb466c056a878dcae27b76eb86a124e0c5203e7a.zip
u-boot-imx-cb466c056a878dcae27b76eb86a124e0c5203e7a.tar.gz
u-boot-imx-cb466c056a878dcae27b76eb86a124e0c5203e7a.tar.bz2
I2C: S3C24X0: Bug fixes in i2c_transfer
This patch corrects the following issues 1) Write the correct M/T Stop value to I2CSTAT after i2c write. According to the spec, after finish the data transmission, we should write a M/T Stop (I2C_MODE_MT | I2C_TXRX_ENA) to I2CSTAT instead of a M/R Stop (I2C_MODE_MR | I2C_TXRX_ENA). 2) Not split the write to I2CSTAT into 2 steps in i2c read. According to the spec, we should write the combined M/R Start value to I2CSTAT after setting the slave address to I2CDS 3) Fix the mistake of making an equality check to an assignment. In the case of I2C write with the zero-length address, while tranfering the data, it should be an equality check (==) instead of an assignment (=). Signed-off-by: Tom Wai-Hong Tam <waihong@chromium.org> Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
-rw-r--r--drivers/i2c/s3c24x0_i2c.c14
1 files changed, 6 insertions, 8 deletions
diff --git a/drivers/i2c/s3c24x0_i2c.c b/drivers/i2c/s3c24x0_i2c.c
index 00308b5..46d2506 100644
--- a/drivers/i2c/s3c24x0_i2c.c
+++ b/drivers/i2c/s3c24x0_i2c.c
@@ -324,7 +324,7 @@ static int i2c_transfer(struct s3c24x0_i2c *i2c,
writel(I2C_MODE_MT | I2C_TXRX_ENA | I2C_START_STOP,
&i2c->iicstat);
i = 0;
- while ((i < data_len) && (result = I2C_OK)) {
+ while ((i < data_len) && (result == I2C_OK)) {
result = WaitForXfer(i2c);
writel(data[i], &i2c->iicds);
ReadWriteByte(i2c);
@@ -336,17 +336,16 @@ static int i2c_transfer(struct s3c24x0_i2c *i2c,
result = WaitForXfer(i2c);
/* send STOP */
- writel(I2C_MODE_MR | I2C_TXRX_ENA, &i2c->iicstat);
+ writel(I2C_MODE_MT | I2C_TXRX_ENA, &i2c->iicstat);
ReadWriteByte(i2c);
break;
case I2C_READ:
if (addr && addr_len) {
- writel(I2C_MODE_MT | I2C_TXRX_ENA, &i2c->iicstat);
writel(chip, &i2c->iicds);
/* send START */
- writel(readl(&i2c->iicstat) | I2C_START_STOP,
- &i2c->iicstat);
+ writel(I2C_MODE_MT | I2C_TXRX_ENA | I2C_START_STOP,
+ &i2c->iicstat);
result = WaitForXfer(i2c);
if (IsACK(i2c)) {
i = 0;
@@ -380,11 +379,10 @@ static int i2c_transfer(struct s3c24x0_i2c *i2c,
}
} else {
- writel(I2C_MODE_MR | I2C_TXRX_ENA, &i2c->iicstat);
writel(chip, &i2c->iicds);
/* send START */
- writel(readl(&i2c->iicstat) | I2C_START_STOP,
- &i2c->iicstat);
+ writel(I2C_MODE_MR | I2C_TXRX_ENA | I2C_START_STOP,
+ &i2c->iicstat);
result = WaitForXfer(i2c);
if (IsACK(i2c)) {