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| author | Simon Glass <sjg@chromium.org> | 2012-12-02 03:44:44 +0000 |
|---|---|---|
| committer | Simon Glass <sjg@chromium.org> | 2012-12-06 14:30:38 -0800 |
| commit | a7e6d5496c7981803482bfa6970eeda2954d3458 (patch) | |
| tree | 332800fb45fe2d94f67b29169db0a5c049c77062 | |
| parent | 55ae10f8dbdf306e210240937ee4d558c8590447 (diff) | |
| download | u-boot-imx-a7e6d5496c7981803482bfa6970eeda2954d3458.zip u-boot-imx-a7e6d5496c7981803482bfa6970eeda2954d3458.tar.gz u-boot-imx-a7e6d5496c7981803482bfa6970eeda2954d3458.tar.bz2 | |
x86: Enable ICH6 GPIO controller for coreboot
Coreboot uses this controller to implement GPIO access.
Signed-off-by: Simon Glass <sjg@chromium.org>
| -rw-r--r-- | include/configs/coreboot.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/include/configs/coreboot.h b/include/configs/coreboot.h index a010adc..fcfa7ed 100644 --- a/include/configs/coreboot.h +++ b/include/configs/coreboot.h @@ -138,6 +138,9 @@ #undef CONFIG_VIDEO #undef CONFIG_CFB_CONSOLE +/* x86 GPIOs are accessed through a PCI device */ +#define CONFIG_INTEL_ICH6_GPIO + /*----------------------------------------------------------------------- * Command line configuration. */ @@ -150,6 +153,7 @@ #define CONFIG_CMD_ECHO #undef CONFIG_CMD_FLASH #define CONFIG_CMD_FPGA +#define CONFIG_CMD_GPIO #define CONFIG_CMD_IMI #undef CONFIG_CMD_IMLS #define CONFIG_CMD_IRQ |