diff options
author | Wolfgang Denk <wd@denx.de> | 2012-04-16 23:01:12 +0200 |
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committer | Wolfgang Denk <wd@denx.de> | 2012-04-16 23:01:12 +0200 |
commit | db39f24151627733d6166c5e9a875fe8b356fa72 (patch) | |
tree | d091e23af47b9ae848c6f69144f941d9f072aae6 | |
parent | b64c2420e02a7d068aae6e0d069f270feb3cdc9a (diff) | |
parent | 2694bb9bcc8ca9636faf38c866dda7bf0529e35f (diff) | |
download | u-boot-imx-db39f24151627733d6166c5e9a875fe8b356fa72.zip u-boot-imx-db39f24151627733d6166c5e9a875fe8b356fa72.tar.gz u-boot-imx-db39f24151627733d6166c5e9a875fe8b356fa72.tar.bz2 |
Merge branch 'master' of git://git.denx.de/u-boot-arm
* 'master' of git://git.denx.de/u-boot-arm:
ARM926EJS: Fix cache.c to comply with checkpatch.pl
ARM926EJS: Make asm routines volatile in cache ops
MX35: mx35pdk: wrong board revision
ARM1136: MX35: Make asm routines volatile in cache ops
ARM: add u-boot.imx as target for i.MX SOCs
M28: Pull out CONFIG_APBH_DMA so it's always enabled
DMA: Split the APBH DMA init into block and channel init
imx: Return gpio_set_value in gpio_direction_output
imx: Use GPIO_TO_PORT macro in the gpio driver instead of (gpio >> 5)
imx: Add GPIO_TO_PORT macro in the mxc_gpio driver
imx: Remove unneeded/repititive definitions from imx headers
i.MX28: Allow coexistence of PIO and DMA mode for SD/MMC
MX31: mx31pdk: drop enable_caches from board file
i.MX28: Fix initial stack pointer position
mx35: mx35pdk: fix when cache functions are linked
mx35: flea3: fix when cache functions are linked
ARM: 926ejs: use debug() for misaligned addresses
ARM1136: add cache flush and invalidate operations
mx6qsabrelite: Fix the serial console port
mx6qsabrelite: Add boot switch setting information into the README
i.MX6: mx6qsabrelite: add cache commands if cache is enabled
i.MX6: implement enable_caches()
i.MX6: define CACHELINE_SIZE
MX53: DDR: Fix ZQHWCTRL field TZQ_CS
mx28evk: Add a README file
mx28: Split the README into a common part and a m28 specific part
tricorder: Load kernel from ubifs
tricorder: Add UBIFS
cm-t35: fix Ethernet reset timing
hawkboard: Add CONFIG_SPL_LIBGENERIC_SUPPORT
BeagleBoard: Remove userbutton command and use gpio command instead
OMAP: Move omap1510inn to Unmaintained / Orphaned
35 files changed, 530 insertions, 364 deletions
diff --git a/MAINTAINERS b/MAINTAINERS index 72f8b64..708ded7 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -669,10 +669,6 @@ Igor Grinberg <grinberg@compulab.co.il> cm-t35 ARM ARMV7 (OMAP3xx Soc) -Kshitij Gupta <kshitij@ti.com> - - omap1510inn ARM925T - Stefan Herbrechtsmeier <stefan@code.herbrechtsmeier.net> dns325 ARM926EJS (Kirkwood SoC) @@ -941,6 +937,9 @@ Sughosh Ganu <urwithsughosh@gmail.com> Unknown / orphaned boards: Board CPU Last known maintainer / Comment ......................................................................... + + omap1510inn ARM925T Kshitij Gupta <kshitij@ti.com> + lubbock xscale/pxa Kyle Harris <kharris@nexus-tech.net> / dead address imx31_phycore_eet i.MX31 Guennadi Liakhovetski <g.liakhovetski@gmx.de> / resigned diff --git a/arch/arm/cpu/arm1136/cpu.c b/arch/arm/cpu/arm1136/cpu.c index 2b91631..f72bab6 100644 --- a/arch/arm/cpu/arm1136/cpu.c +++ b/arch/arm/cpu/arm1136/cpu.c @@ -70,8 +70,105 @@ int cleanup_before_linux (void) static void cache_flush(void) { unsigned long i = 0; + /* clean entire data cache */ + asm volatile("mcr p15, 0, %0, c7, c10, 0" : : "r" (i)); + /* invalidate both caches and flush btb */ + asm volatile("mcr p15, 0, %0, c7, c7, 0" : : "r" (i)); + /* mem barrier to sync things */ + asm volatile("mcr p15, 0, %0, c7, c10, 4" : : "r" (i)); +} + +#ifndef CONFIG_SYS_DCACHE_OFF + +#ifndef CONFIG_SYS_CACHELINE_SIZE +#define CONFIG_SYS_CACHELINE_SIZE 32 +#endif + +void invalidate_dcache_all(void) +{ + asm volatile("mcr p15, 0, %0, c7, c6, 0" : : "r" (0)); +} + +void flush_dcache_all(void) +{ + asm volatile("mcr p15, 0, %0, c7, c10, 0" : : "r" (0)); + asm volatile("mcr p15, 0, %0, c7, c10, 4" : : "r" (0)); +} + +static inline int bad_cache_range(unsigned long start, unsigned long stop) +{ + int ok = 1; + + if (start & (CONFIG_SYS_CACHELINE_SIZE - 1)) + ok = 0; - asm ("mcr p15, 0, %0, c7, c10, 0": :"r" (i)); /* clean entire data cache */ - asm ("mcr p15, 0, %0, c7, c7, 0": :"r" (i)); /* invalidate both caches and flush btb */ - asm ("mcr p15, 0, %0, c7, c10, 4": :"r" (i)); /* mem barrier to sync things */ + if (stop & (CONFIG_SYS_CACHELINE_SIZE - 1)) + ok = 0; + + if (!ok) + debug("CACHE: Misaligned operation at range [%08lx, %08lx]\n", + start, stop); + + return ok; +} + +void invalidate_dcache_range(unsigned long start, unsigned long stop) +{ + if (bad_cache_range(start, stop)) + return; + + while (start < stop) { + asm volatile("mcr p15, 0, %0, c7, c6, 1" : : "r" (start)); + start += CONFIG_SYS_CACHELINE_SIZE; + } +} + +void flush_dcache_range(unsigned long start, unsigned long stop) +{ + if (bad_cache_range(start, stop)) + return; + + while (start < stop) { + asm volatile("mcr p15, 0, %0, c7, c14, 1" : : "r" (start)); + start += CONFIG_SYS_CACHELINE_SIZE; + } + + asm volatile("mcr p15, 0, %0, c7, c10, 4" : : "r" (0)); +} + +void flush_cache(unsigned long start, unsigned long size) +{ + flush_dcache_range(start, start + size); +} + +void enable_caches(void) +{ +#ifndef CONFIG_SYS_ICACHE_OFF + icache_enable(); +#endif +#ifndef CONFIG_SYS_DCACHE_OFF + dcache_enable(); +#endif +} + +#else /* #ifndef CONFIG_SYS_DCACHE_OFF */ +void invalidate_dcache_all(void) +{ +} + +void flush_dcache_all(void) +{ +} + +void invalidate_dcache_range(unsigned long start, unsigned long stop) +{ +} + +void flush_dcache_range(unsigned long start, unsigned long stop) +{ +} + +void flush_cache(unsigned long start, unsigned long size) +{ } +#endif /* #ifndef CONFIG_SYS_DCACHE_OFF */ diff --git a/arch/arm/cpu/arm926ejs/cache.c b/arch/arm/cpu/arm926ejs/cache.c index 5b23e3a..2740ad7 100644 --- a/arch/arm/cpu/arm926ejs/cache.c +++ b/arch/arm/cpu/arm926ejs/cache.c @@ -30,7 +30,7 @@ void invalidate_dcache_all(void) { - asm volatile("mcr p15, 0, %0, c7, c6, 0\n"::"r"(0)); + asm volatile("mcr p15, 0, %0, c7, c6, 0\n" : : "r"(0)); } void flush_dcache_all(void) @@ -40,7 +40,7 @@ void flush_dcache_all(void) "mrc p15, 0, r15, c7, c14, 3\n" "bne 0b\n" "mcr p15, 0, %0, c7, c10, 4\n" - ::"r"(0):"memory" + : : "r"(0) : "memory" ); } @@ -55,7 +55,7 @@ static int check_cache_range(unsigned long start, unsigned long stop) ok = 0; if (!ok) - printf("CACHE: Misaligned operation at range [%08lx, %08lx]\n", + debug("CACHE: Misaligned operation at range [%08lx, %08lx]\n", start, stop); return ok; @@ -67,7 +67,7 @@ void invalidate_dcache_range(unsigned long start, unsigned long stop) return; while (start < stop) { - asm volatile("mcr p15, 0, %0, c7, c6, 1\n"::"r"(start)); + asm volatile("mcr p15, 0, %0, c7, c6, 1\n" : : "r"(start)); start += CONFIG_SYS_CACHELINE_SIZE; } } @@ -78,11 +78,11 @@ void flush_dcache_range(unsigned long start, unsigned long stop) return; while (start < stop) { - asm volatile("mcr p15, 0, %0, c7, c14, 1\n"::"r"(start)); + asm volatile("mcr p15, 0, %0, c7, c14, 1\n" : : "r"(start)); start += CONFIG_SYS_CACHELINE_SIZE; } - asm("mcr p15, 0, %0, c7, c10, 4\n"::"r"(0)); + asm volatile("mcr p15, 0, %0, c7, c10, 4\n" : : "r"(0)); } void flush_cache(unsigned long start, unsigned long size) @@ -114,8 +114,7 @@ void flush_cache(unsigned long start, unsigned long size) /* * Stub implementations for l2 cache operations */ -void __l2_cache_disable(void) -{ -} +void __l2_cache_disable(void) {} + void l2_cache_disable(void) - __attribute__((weak, alias("__l2_cache_disable"))); + __attribute__((weak, alias("__l2_cache_disable"))); diff --git a/arch/arm/cpu/arm926ejs/mx28/mx28.c b/arch/arm/cpu/arm926ejs/mx28/mx28.c index cf6d4e9..dc0338d 100644 --- a/arch/arm/cpu/arm926ejs/mx28/mx28.c +++ b/arch/arm/cpu/arm926ejs/mx28/mx28.c @@ -30,6 +30,7 @@ #include <asm/errno.h> #include <asm/io.h> #include <asm/arch/clock.h> +#include <asm/arch/dma.h> #include <asm/arch/gpio.h> #include <asm/arch/iomux.h> #include <asm/arch/imx-regs.h> @@ -172,6 +173,11 @@ int arch_cpu_init(void) */ mxs_gpio_init(); +#ifdef CONFIG_APBH_DMA + /* Start APBH DMA */ + mxs_dma_init(); +#endif + return 0; } #endif diff --git a/arch/arm/cpu/armv7/config.mk b/arch/arm/cpu/armv7/config.mk index 83ddf10..f532d62 100644 --- a/arch/arm/cpu/armv7/config.mk +++ b/arch/arm/cpu/armv7/config.mk @@ -31,3 +31,6 @@ PLATFORM_CPPFLAGS += -march=armv5 # ========================================================================= PF_RELFLAGS_SLB_AT := $(call cc-option,-mshort-load-bytes,$(call cc-option,-malignment-traps,)) PLATFORM_RELFLAGS += $(PF_RELFLAGS_SLB_AT) +ifneq ($(CONFIG_IMX_CONFIG),) +ALL-y += $(obj)u-boot.imx +endif diff --git a/arch/arm/cpu/armv7/mx6/soc.c b/arch/arm/cpu/armv7/mx6/soc.c index a81e2bc..543b2cc 100644 --- a/arch/arm/cpu/armv7/mx6/soc.c +++ b/arch/arm/cpu/armv7/mx6/soc.c @@ -85,6 +85,14 @@ int arch_cpu_init(void) } #endif +#ifndef CONFIG_SYS_DCACHE_OFF +void enable_caches(void) +{ + /* Enable D-cache. I-cache is already enabled in start.S */ + dcache_enable(); +} +#endif + #if defined(CONFIG_FEC_MXC) void imx_get_mac_from_fuse(int dev_id, unsigned char *mac) { diff --git a/arch/arm/include/asm/arch-mx28/dma.h b/arch/arm/include/asm/arch-mx28/dma.h index 52747e2..4a1820b 100644 --- a/arch/arm/include/asm/arch-mx28/dma.h +++ b/arch/arm/include/asm/arch-mx28/dma.h @@ -140,6 +140,8 @@ void mxs_dma_desc_free(struct mxs_dma_desc *); int mxs_dma_desc_append(int channel, struct mxs_dma_desc *pdesc); int mxs_dma_go(int chan); -int mxs_dma_init(void); +void mxs_dma_init(void); +int mxs_dma_init_channel(int chan); +int mxs_dma_release(int chan); #endif /* __DMA_H__ */ diff --git a/arch/arm/include/asm/arch-mx35/mx35_pins.h b/arch/arm/include/asm/arch-mx35/mx35_pins.h index 3676e33..8c38139 100644 --- a/arch/arm/include/asm/arch-mx35/mx35_pins.h +++ b/arch/arm/include/asm/arch-mx35/mx35_pins.h @@ -84,8 +84,6 @@ GPIO_NUM_PIN) + ((pin >> MUX_IO_I) &\ ((1 << (MUX_IO_P - MUX_IO_I)) - 1))) #define IOMUX_TO_IRQ(pin) (MXC_GPIO_INT_BASE + IOMUX_TO_GPIO(pin)) -#define GPIO_TO_PORT(n) (n / GPIO_NUM_PIN) -#define GPIO_TO_INDEX(n) (n % GPIO_NUM_PIN) #define NON_GPIO_I 0x7 #define PIN_TO_MUX_MASK ((1<<(PAD_I - MUX_I)) - 1) diff --git a/arch/arm/include/asm/arch-mx5/mx5x_pins.h b/arch/arm/include/asm/arch-mx5/mx5x_pins.h index 4e3a31b..122fbee 100644 --- a/arch/arm/include/asm/arch-mx5/mx5x_pins.h +++ b/arch/arm/include/asm/arch-mx5/mx5x_pins.h @@ -78,8 +78,6 @@ GPIO_NUM_PIN) + ((pin >> MUX_IO_I) &\ ((1 << (MUX_IO_P - MUX_IO_I)) - 1))) #define IOMUX_TO_IRQ(pin) (MXC_GPIO_INT_BASE + IOMUX_TO_GPIO(pin)) -#define GPIO_TO_PORT(n) (n / GPIO_NUM_PIN) -#define GPIO_TO_INDEX(n) (n % GPIO_NUM_PIN) #define NON_GPIO_PORT 0x7 #define PIN_TO_MUX_MASK ((1 << (PAD_I - MUX_I)) - 1) diff --git a/arch/arm/include/asm/arch-mx6/imx-regs.h b/arch/arm/include/asm/arch-mx6/imx-regs.h index cad957a..6d25c8d 100644 --- a/arch/arm/include/asm/arch-mx6/imx-regs.h +++ b/arch/arm/include/asm/arch-mx6/imx-regs.h @@ -19,6 +19,8 @@ #ifndef __ASM_ARCH_MX6_IMX_REGS_H__ #define __ASM_ARCH_MX6_IMX_REGS_H__ +#define CONFIG_SYS_CACHELINE_SIZE 32 + #define ROMCP_ARB_BASE_ADDR 0x00000000 #define ROMCP_ARB_END_ADDR 0x000FFFFF #define CAAM_ARB_BASE_ADDR 0x00100000 @@ -168,8 +170,6 @@ #define FEC_QUIRK_ENET_MAC #define GPIO_NUMBER(port, index) ((((port)-1)*32)+((index)&31)) -#define GPIO_TO_PORT(number) (((number)/32)+1) -#define GPIO_TO_INDEX(number) ((number)&31) #if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__)) #include <asm/types.h> diff --git a/board/cm_t35/cm_t35.c b/board/cm_t35/cm_t35.c index 0a04994..7af1f41 100644 --- a/board/cm_t35/cm_t35.c +++ b/board/cm_t35/cm_t35.c @@ -356,16 +356,17 @@ static void reset_net_chip(void) { /* Set GPIO1 of TPS65930 as output */ twl4030_i2c_write_u8(TWL4030_CHIP_GPIO, 0x02, - TWL4030_BASEADD_GPIO+0x03); + TWL4030_BASEADD_GPIO + 0x03); /* Send a pulse on the GPIO pin */ twl4030_i2c_write_u8(TWL4030_CHIP_GPIO, 0x02, - TWL4030_BASEADD_GPIO+0x0C); + TWL4030_BASEADD_GPIO + 0x0C); udelay(1); twl4030_i2c_write_u8(TWL4030_CHIP_GPIO, 0x02, - TWL4030_BASEADD_GPIO+0x09); - udelay(1); + TWL4030_BASEADD_GPIO + 0x09); + mdelay(40); twl4030_i2c_write_u8(TWL4030_CHIP_GPIO, 0x02, - TWL4030_BASEADD_GPIO+0x0C); + TWL4030_BASEADD_GPIO + 0x0C); + mdelay(1); } #else static inline void reset_net_chip(void) {} diff --git a/board/freescale/mx31pdk/mx31pdk.c b/board/freescale/mx31pdk/mx31pdk.c index 1d7b4f6..9f8bc53 100644 --- a/board/freescale/mx31pdk/mx31pdk.c +++ b/board/freescale/mx31pdk/mx31pdk.c @@ -71,19 +71,11 @@ int board_early_init_f(void) return 0; } -void enable_caches(void) -{ - icache_enable(); - dcache_enable(); -} - int board_init(void) { /* adress of boot parameters */ gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100; - enable_caches(); - return 0; } diff --git a/board/freescale/mx35pdk/mx35pdk.c b/board/freescale/mx35pdk/mx35pdk.c index cce7123..bc415b8 100644 --- a/board/freescale/mx35pdk/mx35pdk.c +++ b/board/freescale/mx35pdk/mx35pdk.c @@ -258,17 +258,6 @@ int board_late_init(void) val |= 0x80; mc9sdz60_reg_write(MC9SDZ60_REG_RESET_1, val); - return 0; -} - -int checkboard(void) -{ - /* - * Be sure that I2C is initialized to check - * the board revision - */ - i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); - /* Print board revision */ printf("Board: MX35 PDK %d.0\n", ((get_board_rev() >> 8) + 1) & 0x0F); diff --git a/board/freescale/mx53ard/imximage_dd3.cfg b/board/freescale/mx53ard/imximage_dd3.cfg index 50e05af..614d29e 100644 --- a/board/freescale/mx53ard/imximage_dd3.cfg +++ b/board/freescale/mx53ard/imximage_dd3.cfg @@ -91,6 +91,6 @@ DATA 4 0x63fd901c 0x00028039 DATA 4 0x63fd901c 0x05208138 DATA 4 0x63fd901c 0x04008048 DATA 4 0x63fd9020 0x00005800 -DATA 4 0x63fd9040 0x04b80003 +DATA 4 0x63fd9040 0x05380003 DATA 4 0x63fd9058 0x00022227 DATA 4 0x63fd901C 0x00000000 diff --git a/board/freescale/mx53evk/imximage.cfg b/board/freescale/mx53evk/imximage.cfg index dd7528c..915fb2c 100644 --- a/board/freescale/mx53evk/imximage.cfg +++ b/board/freescale/mx53evk/imximage.cfg @@ -108,5 +108,5 @@ DATA 4 0x63fd901c 0x00448039 DATA 4 0x63fd9020 0x00005800 DATA 4 0x63fd9058 0x00033335 DATA 4 0x63fd901c 0x00000000 -DATA 4 0x63fd9040 0x04b80003 +DATA 4 0x63fd9040 0x05380003 DATA 4 0x53fa8004 0x00194005 diff --git a/board/freescale/mx53loco/imximage.cfg b/board/freescale/mx53loco/imximage.cfg index f30258e..2ce5f8d 100644 --- a/board/freescale/mx53loco/imximage.cfg +++ b/board/freescale/mx53loco/imximage.cfg @@ -91,6 +91,6 @@ DATA 4 0x63fd901c 0x00028039 DATA 4 0x63fd901c 0x05208138 DATA 4 0x63fd901c 0x04008048 DATA 4 0x63fd9020 0x00005800 -DATA 4 0x63fd9040 0x04b80003 +DATA 4 0x63fd9040 0x05380003 DATA 4 0x63fd9058 0x00022227 DATA 4 0x63fd901c 0x00000000 diff --git a/board/freescale/mx53smd/imximage.cfg b/board/freescale/mx53smd/imximage.cfg index 50e05af..614d29e 100644 --- a/board/freescale/mx53smd/imximage.cfg +++ b/board/freescale/mx53smd/imximage.cfg @@ -91,6 +91,6 @@ DATA 4 0x63fd901c 0x00028039 DATA 4 0x63fd901c 0x05208138 DATA 4 0x63fd901c 0x04008048 DATA 4 0x63fd9020 0x00005800 -DATA 4 0x63fd9040 0x04b80003 +DATA 4 0x63fd9040 0x05380003 DATA 4 0x63fd9058 0x00022227 DATA 4 0x63fd901C 0x00000000 diff --git a/board/ti/beagle/beagle.c b/board/ti/beagle/beagle.c index 8b07eef..e26b387 100644 --- a/board/ti/beagle/beagle.c +++ b/board/ti/beagle/beagle.c @@ -507,58 +507,3 @@ int ehci_hcd_stop(void) } #endif /* CONFIG_USB_EHCI */ - -#ifndef CONFIG_SPL_BUILD -/* - * This command returns the status of the user button on beagle xM - * Input - none - * Returns - 1 if button is held down - * 0 if button is not held down - */ -int do_userbutton(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) -{ - int button = 0; - int gpio; - - /* - * pass address parameter as argv[0] (aka command name), - * and all remaining args - */ - switch (get_board_revision()) { - case REVISION_AXBX: - case REVISION_CX: - case REVISION_C4: - gpio = 7; - break; - case REVISION_XM_A: - case REVISION_XM_B: - case REVISION_XM_C: - default: - gpio = 4; - break; - } - gpio_request(gpio, ""); - gpio_direction_input(gpio); - printf("The user button is currently "); - if (gpio_get_value(gpio)) - { - button = 1; - printf("PRESSED.\n"); - } - else - { - button = 0; - printf("NOT pressed.\n"); - } - - return !button; -} - -/* -------------------------------------------------------------------- */ - -U_BOOT_CMD( - userbutton, CONFIG_SYS_MAXARGS, 1, do_userbutton, - "Return the status of the BeagleBoard USER button", - "" -); -#endif diff --git a/doc/README.m28 b/doc/README.m28 index 548982f..7dee8ce 100644 --- a/doc/README.m28 +++ b/doc/README.m28 @@ -1,224 +1,13 @@ DENX M28EVK =========== -This document describes the DENX M28/M28EVK U-Boot port. This document mostly -covers topics related to making the module/board bootable. - -Terminology ------------ - -The dollar symbol ($) introduces a snipped of shell code. This shall be typed -into the unix command prompt in U-Boot source code root directory. - -The (=>) introduces a snipped of code that should by typed into U-Boot command -prompt. - -Contents --------- - -0) Files of the M28/M28EVK port -1) Prerequisites -2) Compiling U-Boot for M28 -3) Installation of U-Boot for M28EVK to SD card -4) Installation of U-Boot for M28 to NAND flash - -0) Files of the M28/M28EVK port -------------------------------- +Files of the M28/M28EVK port +---------------------------- arch/arm/cpu/arm926ejs/mx28/ - The CPU support code for the Freescale i.MX28 arch/arm/include/asm/arch-mx28/ - Header files for the Freescale i.MX28 board/denx/m28evk/ - M28EVK board specific files include/configs/m28evk.h - M28EVK configuration file -1) Prerequisites ----------------- - -To make the M28 module or the M28 module or M28EVK board bootable, some tools -are necessary. The first one is the "elftosb" tool distributed by Freescale -Semiconductor. The other tool is the "mxsboot" tool found in U-Boot source tree. - -Firstly, obtain the elftosb archive from the following location: - - http://foss.doredevelopment.dk/mirrors/imx/elftosb-10.12.01.tar.gz - -We use a $VER variable here to denote the current version. At the time of -writing of this document, that is "10.12.01". To obtain the file from command -line, use: - - $ VER="10.12.01" - $ wget http://foss.doredevelopment.dk/mirrors/imx/elftosb-${VER}.tar.gz - -Extract the file: - - $ tar xzf elftosb-${VER}.tar.gz - -Compile the file. We need to manually tell the linker to use also libm: - - $ cd elftosb-${VER}/ - $ make LIBS="-lstdc++ -lm" elftosb - -Optionally, remove debugging symbols from elftosb: - - $ strip bld/linux/elftosb - -Finally, install the "elftosb" binary. The "install" target is missing, so just -copy the binary by hand: - - $ sudo cp bld/linux/elftosb /usr/local/bin/ - -Make sure the "elftosb" binary can be found in your $PATH, in this case this -means "/usr/local/bin/" has to be in your $PATH. - -2) Compiling U-Boot for M28 ---------------------------- - -Compiling the U-Boot for M28 is straightforward and done as compiling U-Boot -for any other ARM device. For cross-compiler setup, please refer to ELDK5.0 -documentation. First, clean up the source code: - - $ make mrproper - -Next, configure U-Boot for M28EVK: - - $ make m28evk_config - -Lastly, compile U-Boot and prepare a "BootStream". The "BootStream" is a special -type of file, which the i.MX28 CPU can boot. This is handled by the following -command: - - $ make u-boot.sb - -HINT: To speed-up the build process, you can add -j<N>, where N is number of - compiler instances that'll run in parallel. - -The code produces "u-boot.sb" file. This file needs to be augmented with a -proper header to allow successful boot from SD or NAND. Adding the header is -discussed in the following chapters. - -3) Installation of U-Boot for M28EVK to SD card ------------------------------------------------ - -To boot an M28 from SD, set the boot mode DIP switches according to i.MX28 -manual chapter 12.2.1 (Table 12-2), PORT=SSP0, SD/MMC master on SSP0, 3.3V. - -An SD card the i.MX28 CPU can use to boot U-Boot must contain a DOS partition -table, which in turn carries a partition of special type and which contains a -special header. The rest of partitions in the DOS partition table can be used -by the user. - -To prepare such partition, use your favourite partitioning tool. The partition -must have the following parameters: - - * Start sector .......... sector 2048 - * Partition size ........ at least 1024 kb - * Partition type ........ 0x53 (sometimes "OnTrack DM6 Aux3") - -For example in Linux fdisk, the sequence for a clear card follows. Be sure to -run fdisk with the option "-u=sectors" to set units to sectors: - - * o ..................... create a clear partition table - * n ..................... create new partition - * p ............. primary partition - * 1 ............. first partition - * 2048 .......... first sector is 2048 - * +1M ........... make the partition 1Mb big - * t 1 ................... change first partition ID - * 53 ............ change the ID to 0x53 (OnTrack DM6 Aux3) - * <create other partitions> - * w ..................... write partition table to disk - -The partition layout is ready, next the special partition must be filled with -proper contents. The contents is generated by running the following command (see -chapter 2)): - - $ ./tools/mxsboot sd u-boot.sb u-boot.sd - -The resulting file, "u-boot.sd", shall then be written to the partition. In this -case, we assume the first partition of the SD card is /dev/mmcblk0p1: - - $ dd if=u-boot.sd of=/dev/mmcblk0p1 - -Last step is to insert the card into M28EVK and boot. - -NOTE: If the user needs to adjust the start sector, the "mxsboot" tool contains - a "-p" switch for that purpose. The "-p" switch takes the sector number as - an argument. - -4) Installation of U-Boot for M28 to NAND flash ------------------------------------------------ - -To boot an M28 from NAND, set the boot mode DIP switches according to i.MX28 -manual chapter 12.2.1 (Table 12-2), PORT=GPMI, NAND 1.8 V. - -There are two possibilities when preparing an image writable to NAND flash. - - I) The NAND wasn't written at all yet or the BCB is broken - ---------------------------------------------------------- - In this case, both BCB (FCB and DBBT) and firmware needs to be - written to NAND. To generate NAND image containing all these, - there is a tool called "mxsboot" in the "tools/" directory. The tool - is invoked on "u-boot.sb" file from chapter 2): - - $ ./tools/mxsboot nand u-boot.sb u-boot.nand - - NOTE: The above invokation works for NAND flash with geometry of - 2048b per page, 64b OOB data, 128kb erase size. If your chip - has a different geometry, please use: - - -w <size> change page size (default 2048 b) - -o <size> change oob size (default 64 b) - -e <size> change erase size (default 131072 b) - - The geometry information can be obtained from running U-Boot - on M28 by issuing the "nand info" command. - - The resulting file, "u-boot.nand" can be written directly to NAND - from the U-Boot prompt. To simplify the process, the U-Boot default - environment contains script "update_nand_full" to update the system. - - This script expects a working TFTP server containing the file - "u-boot.nand" in it's root directory. This can be changed by - adjusting the "update_nand_full_filename" varible. - - To update the system, run the following in U-Boot prompt: - - => run update_nand_full - - In case you would only need to update the bootloader in future, - see II) below. - - II) The NAND was already written with a good BCB - ------------------------------------------------ - This part applies after the part I) above was done at least once. - - If part I) above was done correctly already, there is no need to - write the FCB and DBBT parts of NAND again. It's possible to upgrade - only the bootloader image. - - To simplify the process of firmware update, the U-Boot default - environment contains script "update_nand_firmware" to update only - the firmware, without rewriting FCB and DBBT. - - This script expects a working TFTP server containing the file - "u-boot.sb" in it's root directory. This can be changed by - adjusting the "update_nand_firmware_filename" varible. - - To update the system, run the following in U-Boot prompt: - - => run update_nand_firmware - - III) Special settings for the update scripts - -------------------------------------------- - There is a slight possibility of the user wanting to adjust the - STRIDE and COUNT options of the NAND boot. For description of these, - see i.MX28 manual section 12.12.1.2 and 12.12.1.3. - - The update scripts take this possibility into account. In case the - user changes STRIDE by blowing fuses, the user also has to change - "update_nand_stride" variable. In case the user changes COUNT by - blowing fuses, the user also has to change "update_nand_count" - variable for the update scripts to work correctly. - - In case the user needs to boot a firmware image bigger than 1Mb, the - user has to adjust the "update_nand_firmware_maxsz" variable for the - update scripts to work properly. +Follow the instructions from doc/README.mx28_common to generate a bootable SD +card or to boot from NAND flash. diff --git a/doc/README.mx28_common b/doc/README.mx28_common new file mode 100644 index 0000000..448d221 --- /dev/null +++ b/doc/README.mx28_common @@ -0,0 +1,226 @@ +Booting U-boot on a MX28 processor +================================== + +This document describes the MX28 U-Boot port. This document mostly +covers topics related to making the module/board bootable. + +Terminology +----------- + +The dollar symbol ($) introduces a snipped of shell code. This shall be typed +into the unix command prompt in U-Boot source code root directory. + +The (=>) introduces a snipped of code that should by typed into U-Boot command +prompt + +Contents +-------- + +1) Prerequisites +2) Compiling U-Boot for a MX28 based board +3) Installation of U-Boot for a MX28 based board to SD card + +1) Prerequisites +---------------- + +To make a MX28 based board bootable, some tools are necessary. The first one +is the "elftosb" tool distributed by Freescale Semiconductor. The other one +is the "mxsboot" tool found in U-Boot source tree. + +Firstly, obtain the elftosb archive from the following location: + + http://foss.doredevelopment.dk/mirrors/imx/elftosb-10.12.01.tar.gz + +We use a $VER variable here to denote the current version. At the time of +writing of this document, that is "10.12.01". To obtain the file from command +line, use: + + $ VER="10.12.01" + $ wget http://foss.doredevelopment.dk/mirrors/imx/elftosb-${VER}.tar.gz + +Extract the file: + + $ tar xzf elftosb-${VER}.tar.gz + +Compile the file. We need to manually tell the linker to use also libm: + + $ cd elftosb-${VER}/ + $ make LIBS="-lstdc++ -lm" elftosb + +Optionally, remove debugging symbols from elftosb: + + $ strip bld/linux/elftosb + +Finally, install the "elftosb" binary. The "install" target is missing, so just +copy the binary by hand: + + $ sudo cp bld/linux/elftosb /usr/local/bin/ + +Make sure the "elftosb" binary can be found in your $PATH, in this case this +means "/usr/local/bin/" has to be in your $PATH. + +2) Compiling U-Boot for a MX28 based board +------------------------------------------- + +Compiling the U-Boot for a MX28 board is straightforward and done as compiling U-Boot +for any other ARM device. For cross-compiler setup, please refer to ELDK5.0 +documentation. First, clean up the source code: + + $ make mrproper + +Next, configure U-Boot for a MX28 based board + + $ make <mx28_based_board_name>_config + +Examples: + +1. For building U-boot for Denx M28EVK board: + + $ make m28evk_config + +2. For building U-boot for Freescale MX28EVK board: + + $ make mx28evk_config + +Lastly, compile U-Boot and prepare a "BootStream". The "BootStream" is a special +type of file, which the i.MX28 CPU can boot. This is handled by the following +command: + + $ make u-boot.sb + +HINT: To speed-up the build process, you can add -j<N>, where N is number of + compiler instances that'll run in parallel. + +The code produces "u-boot.sb" file. This file needs to be augmented with a +proper header to allow successful boot from SD or NAND. Adding the header is +discussed in the following chapters. + +3) Installation of U-Boot for a MX28 based board to SD card +----------------------------------------------------------- + +To boot a MX28 based board from SD, set the boot mode DIP switches according +to i.MX28 manual chapter 12.2.1 (Table 12-2), PORT=SSP0, SD/MMC master on +SSP0, 3.3V. + + +An SD card the i.MX28 CPU can use to boot U-Boot must contain a DOS partition +table, which in turn carries a partition of special type and which contains a +special header. The rest of partitions in the DOS partition table can be used +by the user. + +To prepare such partition, use your favourite partitioning tool. The partition +must have the following parameters: + + * Start sector .......... sector 2048 + * Partition size ........ at least 1024 kb + * Partition type ........ 0x53 (sometimes "OnTrack DM6 Aux3") + +For example in Linux fdisk, the sequence for a clear card follows. Be sure to +run fdisk with the option "-u=sectors" to set units to sectors: + + * o ..................... create a clear partition table + * n ..................... create new partition + * p ............. primary partition + * 1 ............. first partition + * 2048 .......... first sector is 2048 + * +1M ........... make the partition 1Mb big + * t 1 ................... change first partition ID + * 53 ............ change the ID to 0x53 (OnTrack DM6 Aux3) + * <create other partitions> + * w ..................... write partition table to disk + +The partition layout is ready, next the special partition must be filled with +proper contents. The contents is generated by running the following command +(see chapter 2)): + + $ ./tools/mxsboot sd u-boot.sb u-boot.sd + +The resulting file, "u-boot.sd", shall then be written to the partition. In this +case, we assume the first partition of the SD card is /dev/mmcblk0p1: + + $ dd if=u-boot.sd of=/dev/mmcblk0p1 + +Last step is to insert the card into MX28 based board and boot. + +NOTE: If the user needs to adjust the start sector, the "mxsboot" tool contains + a "-p" switch for that purpose. The "-p" switch takes the sector number as + an argument. + +4) Installation of U-Boot for NAND flash +----------------------------------------------- + +To boot a MX28 based board from NAND, set the boot mode DIP switches according to i.MX28 +manual chapter 12.2.1 (Table 12-2), PORT=GPMI, NAND 1.8 V. + +There are two possibilities when preparing an image writable to NAND flash. + + I) The NAND wasn't written at all yet or the BCB is broken + ---------------------------------------------------------- + In this case, both BCB (FCB and DBBT) and firmware needs to be + written to NAND. To generate NAND image containing all these, + there is a tool called "mxsboot" in the "tools/" directory. The tool + is invoked on "u-boot.sb" file from chapter 2): + + $ ./tools/mxsboot nand u-boot.sb u-boot.nand + + NOTE: The above invokation works for NAND flash with geometry of + 2048b per page, 64b OOB data, 128kb erase size. If your chip + has a different geometry, please use: + + -w <size> change page size (default 2048 b) + -o <size> change oob size (default 64 b) + -e <size> change erase size (default 131072 b) + + The geometry information can be obtained from running U-Boot + on the MX28 board by issuing the "nand info" command. + + The resulting file, "u-boot.nand" can be written directly to NAND + from the U-Boot prompt. To simplify the process, the U-Boot default + environment contains script "update_nand_full" to update the system. + + This script expects a working TFTP server containing the file + "u-boot.nand" in it's root directory. This can be changed by + adjusting the "update_nand_full_filename" varible. + + To update the system, run the following in U-Boot prompt: + + => run update_nand_full + + In case you would only need to update the bootloader in future, + see II) below. + + II) The NAND was already written with a good BCB + ------------------------------------------------ + This part applies after the part I) above was done at least once. + + If part I) above was done correctly already, there is no need to + write the FCB and DBBT parts of NAND again. It's possible to upgrade + only the bootloader image. + + To simplify the process of firmware update, the U-Boot default + environment contains script "update_nand_firmware" to update only + the firmware, without rewriting FCB and DBBT. + + This script expects a working TFTP server containing the file + "u-boot.sb" in it's root directory. This can be changed by + adjusting the "update_nand_firmware_filename" varible. + + To update the system, run the following in U-Boot prompt: + + => run update_nand_firmware + + III) Special settings for the update scripts + -------------------------------------------- + There is a slight possibility of the user wanting to adjust the + STRIDE and COUNT options of the NAND boot. For description of these, + see i.MX28 manual section 12.12.1.2 and 12.12.1.3. + + The update scripts take this possibility into account. In case the + user changes STRIDE by blowing fuses, the user also has to change + "update_nand_stride" variable. In case the user changes COUNT by + blowing fuses, the user also has to change "update_nand_count" + variable for the update scripts to work correctly. + + In case the user needs to boot a firmware image bigger than 1Mb, the + user has to adjust the "update_nand_firmware_maxsz" variable for the + update scripts to work properly. diff --git a/doc/README.mx28evk b/doc/README.mx28evk new file mode 100644 index 0000000..c6c3d37 --- /dev/null +++ b/doc/README.mx28evk @@ -0,0 +1,29 @@ +FREESCALE MX28EVK +================== + +Supported hardware: only MX28EVK rev D is supported in U-boot. + +Files of the MX28EVK port +-------------------------- + +arch/arm/cpu/arm926ejs/mx28/ - The CPU support code for the Freescale i.MX28 +arch/arm/include/asm/arch-mx28/ - Header files for the Freescale i.MX28 +board/freescale/mx28evk/ - MX28EVK board specific files +include/configs/mx28evk.h - MX28EVK configuration file + +Jumper configuration +--------------------- + +To boot MX28EVK from an SD card, set the boot mode DIP switches as: + + * Boot Mode Select: 1 0 0 1 (Boot from SD card Slot 0 - U42) + * JTAG PSWITCH RESET: To the left (reset enabled) + * Battery Source: Down + * Wall 5V: Up + * VDD 5V: To the left (off) + * Hold Button: Down (off) + +Follow the instructions from doc/README.mx28_common to generate a bootable SD +card. + +Insert the SD card in slot 0, power up the board and U-boot will boot. diff --git a/doc/README.mx6qsabrelite b/doc/README.mx6qsabrelite index 0498cba..6f2f534 100644 --- a/doc/README.mx6qsabrelite +++ b/doc/README.mx6qsabrelite @@ -31,7 +31,8 @@ Note: Replace sXx with the device representing the SD card in your system. Note: This writes SD card loader at address 0 2. Put this SD card into the slot for the large SD card (SD3 on the bottom of -the board) +the board). Make sure SW1 switch is at position "00", so that it can boot +from the fuses. 3. Power-up the SabreLite, press 'space' to enter command mode in the U-Boot (the default one the board is shipped with, starting from the SPI NOR) and diff --git a/drivers/dma/apbh_dma.c b/drivers/dma/apbh_dma.c index c086629..cb2193e 100644 --- a/drivers/dma/apbh_dma.c +++ b/drivers/dma/apbh_dma.c @@ -316,7 +316,7 @@ static int mxs_dma_request(int channel) * The channel will NOT be released if it's marked "busy" (see * mxs_dma_enable()). */ -static int mxs_dma_release(int channel) +int mxs_dma_release(int channel) { struct mxs_dma_chan *pchan; int ret; @@ -552,12 +552,10 @@ int mxs_dma_go(int chan) /* * Initialize the DMA hardware */ -int mxs_dma_init(void) +void mxs_dma_init(void) { struct mx28_apbh_regs *apbh_regs = (struct mx28_apbh_regs *)MXS_APBH_BASE; - struct mxs_dma_chan *pchan; - int ret, channel; mx28_reset_block(&apbh_regs->hw_apbh_ctrl0_reg); @@ -576,28 +574,26 @@ int mxs_dma_init(void) writel(APBH_CTRL0_APB_BURST_EN, &apbh_regs->hw_apbh_ctrl0_clr); #endif +} - for (channel = 0; channel < MXS_MAX_DMA_CHANNELS; channel++) { - pchan = mxs_dma_channels + channel; - pchan->flags = MXS_DMA_FLAGS_VALID; - - ret = mxs_dma_request(channel); +int mxs_dma_init_channel(int channel) +{ + struct mxs_dma_chan *pchan; + int ret; - if (ret) { - printf("MXS DMA: Can't acquire DMA channel %i\n", - channel); + pchan = mxs_dma_channels + channel; + pchan->flags = MXS_DMA_FLAGS_VALID; - goto err; - } + ret = mxs_dma_request(channel); - mxs_dma_reset(channel); - mxs_dma_ack_irq(channel); + if (ret) { + printf("MXS DMA: Can't acquire DMA channel %i\n", + channel); + return ret; } - return 0; + mxs_dma_reset(channel); + mxs_dma_ack_irq(channel); -err: - while (--channel >= 0) - mxs_dma_release(channel); - return ret; + return 0; } diff --git a/drivers/gpio/mxc_gpio.c b/drivers/gpio/mxc_gpio.c index df6bbbb..f1b1c16 100644 --- a/drivers/gpio/mxc_gpio.c +++ b/drivers/gpio/mxc_gpio.c @@ -34,6 +34,7 @@ enum mxc_gpio_direction { MXC_GPIO_DIRECTION_OUT, }; +#define GPIO_TO_PORT(n) (n / 32) /* GPIO port description */ static unsigned long gpio_ports[] = { @@ -53,7 +54,7 @@ static unsigned long gpio_ports[] = { static int mxc_gpio_direction(unsigned int gpio, enum mxc_gpio_direction direction) { - unsigned int port = gpio >> 5; + unsigned int port = GPIO_TO_PORT(gpio); struct gpio_regs *regs; u32 l; @@ -80,7 +81,7 @@ static int mxc_gpio_direction(unsigned int gpio, int gpio_set_value(unsigned gpio, int value) { - unsigned int port = gpio >> 5; + unsigned int port = GPIO_TO_PORT(gpio); struct gpio_regs *regs; u32 l; @@ -103,7 +104,7 @@ int gpio_set_value(unsigned gpio, int value) int gpio_get_value(unsigned gpio) { - unsigned int port = gpio >> 5; + unsigned int port = GPIO_TO_PORT(gpio); struct gpio_regs *regs; u32 val; @@ -121,7 +122,7 @@ int gpio_get_value(unsigned gpio) int gpio_request(unsigned gpio, const char *label) { - unsigned int port = gpio >> 5; + unsigned int port = GPIO_TO_PORT(gpio); if (port >= ARRAY_SIZE(gpio_ports)) return -1; return 0; @@ -144,6 +145,5 @@ int gpio_direction_output(unsigned gpio, int value) if (ret < 0) return ret; - gpio_set_value(gpio, value); - return 0; + return gpio_set_value(gpio, value); } diff --git a/drivers/mmc/mxsmmc.c b/drivers/mmc/mxsmmc.c index e8bad9d..35c6bda 100644 --- a/drivers/mmc/mxsmmc.c +++ b/drivers/mmc/mxsmmc.c @@ -43,6 +43,13 @@ #include <asm/arch/sys_proto.h> #include <asm/arch/dma.h> +/* + * CONFIG_MXS_MMC_DMA: This feature is highly experimental and has no + * performance benefit unless you operate the platform with + * data cache enabled. This is disabled by default, enable + * only if you know what you're doing. + */ + struct mxsmmc_priv { int id; struct mx28_ssp_regs *regs; @@ -66,8 +73,13 @@ mxsmmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data) struct mx28_ssp_regs *ssp_regs = priv->regs; uint32_t reg; int timeout; - uint32_t data_count, cache_data_count; + uint32_t data_count; uint32_t ctrl0; +#ifndef CONFIG_MXS_MMC_DMA + uint32_t *data_ptr; +#else + uint32_t cache_data_count; +#endif debug("MMC%d: CMD%d\n", mmc->block_dev.dev, cmd->cmdidx); @@ -185,7 +197,9 @@ mxsmmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data) return 0; data_count = data->blocksize * data->blocks; + timeout = MXSMMC_MAX_TIMEOUT; +#ifdef CONFIG_MXS_MMC_DMA if (data_count % ARCH_DMA_MINALIGN) cache_data_count = roundup(data_count, ARCH_DMA_MINALIGN); else @@ -218,6 +232,38 @@ mxsmmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data) invalidate_dcache_range((uint32_t)priv->desc->cmd.address, (uint32_t)(priv->desc->cmd.address + cache_data_count)); } +#else + if (data->flags & MMC_DATA_READ) { + data_ptr = (uint32_t *)data->dest; + while (data_count && --timeout) { + reg = readl(&ssp_regs->hw_ssp_status); + if (!(reg & SSP_STATUS_FIFO_EMPTY)) { + *data_ptr++ = readl(&ssp_regs->hw_ssp_data); + data_count -= 4; + timeout = MXSMMC_MAX_TIMEOUT; + } else + udelay(1000); + } + } else { + data_ptr = (uint32_t *)data->src; + timeout *= 100; + while (data_count && --timeout) { + reg = readl(&ssp_regs->hw_ssp_status); + if (!(reg & SSP_STATUS_FIFO_FULL)) { + writel(*data_ptr++, &ssp_regs->hw_ssp_data); + data_count -= 4; + timeout = MXSMMC_MAX_TIMEOUT; + } else + udelay(1000); + } + } + + if (!timeout) { + printf("MMC%d: Data timeout with command %d (status 0x%08x)!\n", + mmc->block_dev.dev, cmd->cmdidx, reg); + return COMM_ERR; + } +#endif /* Check data errors */ reg = readl(&ssp_regs->hw_ssp_status); @@ -292,6 +338,7 @@ int mxsmmc_initialize(bd_t *bis, int id, int (*wp)(int)) (struct mx28_clkctrl_regs *)MXS_CLKCTRL_BASE; struct mmc *mmc = NULL; struct mxsmmc_priv *priv = NULL; + int ret; mmc = malloc(sizeof(struct mmc)); if (!mmc) @@ -310,6 +357,10 @@ int mxsmmc_initialize(bd_t *bis, int id, int (*wp)(int)) return -ENOMEM; } + ret = mxs_dma_init_channel(id); + if (ret) + return ret; + priv->mmc_is_wp = wp; priv->id = id; switch (id) { diff --git a/drivers/mtd/nand/mxs_nand.c b/drivers/mtd/nand/mxs_nand.c index 4b1297a..9c95811 100644 --- a/drivers/mtd/nand/mxs_nand.c +++ b/drivers/mtd/nand/mxs_nand.c @@ -1058,7 +1058,7 @@ int mxs_nand_init(struct mxs_nand_info *info) { struct mx28_gpmi_regs *gpmi_regs = (struct mx28_gpmi_regs *)MXS_GPMI_BASE; - int i = 0; + int i = 0, j; info->desc = malloc(sizeof(struct mxs_dma_desc *) * MXS_NAND_DMA_DESCRIPTOR_COUNT); @@ -1073,7 +1073,11 @@ int mxs_nand_init(struct mxs_nand_info *info) } /* Init the DMA controller. */ - mxs_dma_init(); + for (j = MXS_DMA_CHANNEL_AHB_APBH_GPMI0; + j <= MXS_DMA_CHANNEL_AHB_APBH_GPMI7; j++) { + if (mxs_dma_init_channel(j)) + goto err3; + } /* Reset the GPMI block. */ mx28_reset_block(&gpmi_regs->hw_gpmi_ctrl0_reg); @@ -1089,6 +1093,9 @@ int mxs_nand_init(struct mxs_nand_info *info) return 0; +err3: + for (--j; j >= 0; j--) + mxs_dma_release(j); err2: free(info->desc); err1: diff --git a/include/configs/flea3.h b/include/configs/flea3.h index 649e272..f046a58 100644 --- a/include/configs/flea3.h +++ b/include/configs/flea3.h @@ -34,6 +34,7 @@ #define CONFIG_MX35_HCLK_FREQ 24000000 #define CONFIG_SYS_DCACHE_OFF +#define CONFIG_SYS_CACHELINE_SIZE 32 #define CONFIG_DISPLAY_CPUINFO @@ -98,6 +99,7 @@ #define CONFIG_BOOTP_DNS #define CONFIG_CMD_NAND +#define CONFIG_CMD_CACHE #define CONFIG_CMD_I2C #define CONFIG_CMD_SPI diff --git a/include/configs/hawkboard.h b/include/configs/hawkboard.h index 50a1c17..0859371 100644 --- a/include/configs/hawkboard.h +++ b/include/configs/hawkboard.h @@ -62,6 +62,7 @@ #define CONFIG_SPL_NAND_SUPPORT #define CONFIG_SPL_NAND_SIMPLE #define CONFIG_SPL_NAND_LOAD +#define CONFIG_SPL_LIBGENERIC_SUPPORT /* for udelay and __div64_32 for NAND */ #define CONFIG_SPL_SERIAL_SUPPORT #define CONFIG_SPL_LDSCRIPT "board/$(BOARDDIR)/u-boot-spl-hawk.lds" #define CONFIG_SPL_TEXT_BASE 0xc1080000 diff --git a/include/configs/m28evk.h b/include/configs/m28evk.h index 8b83180..012381a 100644 --- a/include/configs/m28evk.h +++ b/include/configs/m28evk.h @@ -93,7 +93,7 @@ #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 /* Point initial SP in SRAM so SPL can use it too. */ -#define CONFIG_SYS_INIT_RAM_ADDR 0x00002000 +#define CONFIG_SYS_INIT_RAM_ADDR 0x00000000 #define CONFIG_SYS_INIT_RAM_SIZE (128 * 1024) #define CONFIG_SYS_INIT_SP_OFFSET \ @@ -146,12 +146,16 @@ #endif /* + * APBH DMA + */ +#define CONFIG_APBH_DMA + +/* * NAND */ #define CONFIG_ENV_SIZE (16 * 1024) #ifdef CONFIG_CMD_NAND #define CONFIG_NAND_MXS -#define CONFIG_APBH_DMA #define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_BASE 0x60000000 #define CONFIG_SYS_NAND_5_ADDR_CYCLE diff --git a/include/configs/mx28evk.h b/include/configs/mx28evk.h index 705fdab..02f3366 100644 --- a/include/configs/mx28evk.h +++ b/include/configs/mx28evk.h @@ -81,7 +81,7 @@ #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 /* Point initial SP in SRAM so SPL can use it too. */ -#define CONFIG_SYS_INIT_RAM_ADDR 0x00002000 +#define CONFIG_SYS_INIT_RAM_ADDR 0x00000000 #define CONFIG_SYS_INIT_RAM_SIZE (128 * 1024) #define CONFIG_SYS_INIT_SP_OFFSET \ diff --git a/include/configs/mx35pdk.h b/include/configs/mx35pdk.h index 0c62b9f..de4b954 100644 --- a/include/configs/mx35pdk.h +++ b/include/configs/mx35pdk.h @@ -34,10 +34,10 @@ #define CONFIG_MX35_HCLK_FREQ 24000000 #define CONFIG_DISPLAY_CPUINFO -#define CONFIG_DISPLAY_BOARDINFO /* Set TEXT at the beginning of the NOR flash */ #define CONFIG_SYS_TEXT_BASE 0xA0000000 +#define CONFIG_SYS_CACHELINE_SIZE 32 #define CONFIG_SYS_64BIT_VSPRINTF @@ -106,6 +106,7 @@ #define CONFIG_BOOTP_DNS #define CONFIG_CMD_NAND +#define CONFIG_CMD_CACHE #define CONFIG_CMD_I2C #define CONFIG_CMD_SPI diff --git a/include/configs/mx6qarm2.h b/include/configs/mx6qarm2.h index 0962d3c..e83aec6 100644 --- a/include/configs/mx6qarm2.h +++ b/include/configs/mx6qarm2.h @@ -169,4 +169,6 @@ #define CONFIG_OF_LIBFDT +#define CONFIG_SYS_DCACHE_OFF + #endif /* __CONFIG_H */ diff --git a/include/configs/mx6qsabrelite.h b/include/configs/mx6qsabrelite.h index 8bc8a83..f52c3c7 100644 --- a/include/configs/mx6qsabrelite.h +++ b/include/configs/mx6qsabrelite.h @@ -116,7 +116,7 @@ #define CONFIG_EXTRA_ENV_SETTINGS \ "script=boot.scr\0" \ "uimage=uImage\0" \ - "console=ttymxc3\0" \ + "console=ttymxc1\0" \ "fdt_high=0xffffffff\0" \ "initrd_high=0xffffffff\0" \ "mmcdev=0\0" \ @@ -212,4 +212,10 @@ #define CONFIG_OF_LIBFDT +#define CONFIG_SYS_DCACHE_OFF + +#ifndef CONFIG_SYS_DCACHE_OFF +#define CONFIG_CMD_CACHE +#endif + #endif /* __CONFIG_H */ diff --git a/include/configs/omap3_beagle.h b/include/configs/omap3_beagle.h index d3a0122..ddeb414 100644 --- a/include/configs/omap3_beagle.h +++ b/include/configs/omap3_beagle.h @@ -167,6 +167,7 @@ #define CONFIG_CMD_PING #define CONFIG_CMD_DHCP #define CONFIG_CMD_SETEXPR /* Evaluate expressions */ +#define CONFIG_CMD_GPIO /* Enable gpio command */ #undef CONFIG_CMD_FLASH /* flinfo, erase, protect */ #undef CONFIG_CMD_FPGA /* FPGA configuration Support */ @@ -280,10 +281,16 @@ "ramboot=echo Booting from ramdisk ...; " \ "run ramargs; " \ "bootm ${loadaddr}\0" \ - + "userbutton=if gpio input 173; then run userbutton_xm; " \ + "else run userbutton_nonxm; fi;\0" \ + "userbutton_xm=gpio input 4;\0" \ + "userbutton_nonxm=gpio input 7;\0" +/* "run userbutton" will return 1 (false) if is pressed and 0 (false) if not */ #define CONFIG_BOOTCOMMAND \ "if mmc rescan ${mmcdev}; then " \ - "if userbutton; then " \ + "if run userbutton; then " \ + "setenv bootenv uEnv.txt;" \ + "else " \ "setenv bootenv user.txt;" \ "fi;" \ "echo SD/MMC found on device ${mmcdev};" \ diff --git a/include/configs/tricorder.h b/include/configs/tricorder.h index ba8847b..801a24f 100644 --- a/include/configs/tricorder.h +++ b/include/configs/tricorder.h @@ -71,7 +71,7 @@ /* Size of malloc() pool */ #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */ /* Sector */ -#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (512 << 10)) +#define CONFIG_SYS_MALLOC_LEN (1024*1024) /* Hardware drivers */ @@ -139,7 +139,9 @@ #define CONFIG_CMD_MTDPARTS /* Enable MTD parts commands */ #define CONFIG_CMD_NAND /* NAND support */ #define CONFIG_CMD_NAND_LOCK_UNLOCK /* nand (un)lock commands */ -#define CONFIG_CMD_UBI /* UBIFS commands */ +#define CONFIG_CMD_UBI /* UBI commands */ +#define CONFIG_CMD_UBIFS /* UBIFS commands */ +#define CONFIG_LZO /* LZO is needed for UBIFS */ #undef CONFIG_CMD_NET #undef CONFIG_CMD_NFS @@ -180,7 +182,8 @@ "setenv bootargs ${bootargs} " \ "omapfb.mode=lcd:${lcdmode} " \ "omapdss.def_disp=${defaultdisplay} " \ - "root=ubi0:rootfs " \ + "root=ubi0:root " \ + "ubi.mtd=4 " \ "rootfstype=ubifs " \ "${kernelopts}\0" \ "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \ @@ -191,9 +194,13 @@ "mmcboot=echo Booting from mmc ...; " \ "run mmcargs; " \ "bootm ${loadaddr}\0" \ + "loaduimage_ubi=mtd default; " \ + "ubi part fs; " \ + "ubifsmount root; " \ + "ubifsload ${loadaddr} /boot/uImage\0" \ "nandboot=echo Booting from nand ...; " \ "run nandargs; " \ - "nand read ${loadaddr} 280000 400000; " \ + "run loaduimage_ubi; " \ "bootm ${loadaddr}\0" \ "autoboot=if mmc rescan ${mmcdev}; then " \ "if run loadbootscript; then " \ |