summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorJason Liu <r64343@freescale.com>2013-09-24 11:54:32 +0800
committerJason Liu <r64343@freescale.com>2013-09-25 13:42:01 +0800
commit54ee963fc2d18c23cdd49bfc84b5ddc00ac1a82c (patch)
treee000bc1d89c4d164da08dcd7855e5b77685540ac
parent7efc9b0730f953d6b1a9f54de9f792a15c0c7a4f (diff)
downloadu-boot-imx-54ee963fc2d18c23cdd49bfc84b5ddc00ac1a82c.zip
u-boot-imx-54ee963fc2d18c23cdd49bfc84b5ddc00ac1a82c.tar.gz
u-boot-imx-54ee963fc2d18c23cdd49bfc84b5ddc00ac1a82c.tar.bz2
ENGR00280957 mx6qsabreauto: add the SATA boot support
This patch add the SATA boot support for the mx6qsabreauto board Signed-off-by: Jason Liu <r64343@freescale.com>
-rw-r--r--board/freescale/mx6qsabreauto/mx6q.cfg2
-rw-r--r--board/freescale/mx6qsabreauto/mx6qsabreauto.c29
-rw-r--r--boards.cfg1
3 files changed, 31 insertions, 1 deletions
diff --git a/board/freescale/mx6qsabreauto/mx6q.cfg b/board/freescale/mx6qsabreauto/mx6q.cfg
index ea365c2..4c1cc09 100644
--- a/board/freescale/mx6qsabreauto/mx6q.cfg
+++ b/board/freescale/mx6qsabreauto/mx6q.cfg
@@ -156,7 +156,7 @@ DATA 4, 0x020c406c, 0x0030FC03
DATA 4, 0x020c4070, 0x0FFFC000
DATA 4, 0x020c4074, 0x3FF00000
DATA 4, 0x020c4078, 0xFFFFF300
-DATA 4, 0x020c407c, 0x0F0000C3
+DATA 4, 0x020c407c, 0x0F0000F3
DATA 4, 0x020c4080, 0x00000FFF
/* enable AXI cache for VDOA/VPU/IPU */
diff --git a/board/freescale/mx6qsabreauto/mx6qsabreauto.c b/board/freescale/mx6qsabreauto/mx6qsabreauto.c
index f7496c2..136f5ff 100644
--- a/board/freescale/mx6qsabreauto/mx6qsabreauto.c
+++ b/board/freescale/mx6qsabreauto/mx6qsabreauto.c
@@ -411,6 +411,31 @@ static void setup_gpmi_nand(void)
}
#endif
+#ifdef CONFIG_CMD_SATA
+int setup_sata(void)
+{
+ struct iomuxc_base_regs *const iomuxc_regs
+ = (struct iomuxc_base_regs *) IOMUXC_BASE_ADDR;
+ int ret = enable_sata_clock();
+ if (ret)
+ return ret;
+
+ clrsetbits_le32(&iomuxc_regs->gpr[13],
+ IOMUXC_GPR13_SATA_MASK,
+ IOMUXC_GPR13_SATA_PHY_8_RXEQ_3P0DB
+ |IOMUXC_GPR13_SATA_PHY_7_SATA2M
+ |IOMUXC_GPR13_SATA_SPEED_3G
+ |(3<<IOMUXC_GPR13_SATA_PHY_6_SHIFT)
+ |IOMUXC_GPR13_SATA_SATA_PHY_5_SS_DISABLED
+ |IOMUXC_GPR13_SATA_SATA_PHY_4_ATTEN_9_16
+ |IOMUXC_GPR13_SATA_PHY_3_TXBOOST_0P00_DB
+ |IOMUXC_GPR13_SATA_PHY_2_TX_1P104V
+ |IOMUXC_GPR13_SATA_PHY_1_SLOW);
+
+ return 0;
+}
+#endif
+
int mx6_rgmii_rework(struct phy_device *phydev)
{
unsigned short val;
@@ -506,6 +531,10 @@ int board_early_init_f(void)
#ifdef CONFIG_SYS_USE_NAND
setup_gpmi_nand();
#endif
+
+#ifdef CONFIG_CMD_SATA
+ setup_sata();
+#endif
return 0;
}
diff --git a/boards.cfg b/boards.cfg
index 57166a0..750dcb1 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -266,6 +266,7 @@ mx6qsabreauto arm armv7 mx6qsabreauto freesca
mx6qsabreauto_spinor arm armv7 mx6qsabreauto freescale mx6 mx6qsabreauto:IMX_CONFIG=board/freescale/mx6qsabreauto/mx6q.cfg,MX6Q,DEFAULT_FDT_FILE="imx6q-sabreauto.dtb",DDR_MB=2048,SYS_BOOT_SPINOR
mx6qsabreauto_eimnor arm armv7 mx6qsabreauto freescale mx6 mx6qsabreauto:IMX_CONFIG=board/freescale/mx6qsabreauto/mx6q.cfg,MX6Q,DEFAULT_FDT_FILE="imx6q-sabreauto.dtb",DDR_MB=2048,SYS_BOOT_EIMNOR
mx6qsabreauto_nand arm armv7 mx6qsabreauto freescale mx6 mx6qsabreauto:IMX_CONFIG=board/freescale/mx6qsabreauto/mx6q.cfg,MX6Q,DEFAULT_FDT_FILE="imx6q-sabreauto.dtb",DDR_MB=2048,SYS_BOOT_NAND
+mx6qsabreauto_sata arm armv7 mx6qsabreauto freescale mx6 mx6qsabreauto:IMX_CONFIG=board/freescale/mx6qsabreauto/mx6q.cfg,MX6Q,DEFAULT_FDT_FILE="imx6q-sabreauto.dtb",DDR_MB=2048,SYS_BOOT_SATA
mx6qsabrelite arm armv7 mx6qsabrelite freescale mx6 mx6qsabrelite:IMX_CONFIG=board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg
mx6qsabresd arm armv7 mx6qsabresd freescale mx6 mx6qsabresd:IMX_CONFIG=board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg,MX6Q,DEFAULT_FDT_FILE="imx6q-sabresd.dtb",DDR_MB=1024,SYS_USE_SPINOR
mx6qsabresd_sata arm armv7 mx6qsabresd freescale mx6 mx6qsabresd:IMX_CONFIG=board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg,MX6Q,DEFAULT_FDT_FILE="imx6q-sabresd.dtb",DDR_MB=1024,SYS_USE_SPINOR,SYS_BOOT_SATA