arm: mvebu: drivers/ddr: Move Armada XP DDR init code into new directory

With the upcoming addition of the Armada 38x DDR support, which is not
compatible to the Armada XP DDR init code, we need to introduce a new
directory infrastructure. To support multiple Marvell DDR controller.

This will be the new structure:

     drivers/ddr/marvell/axp
     Supporting Armada XP (AXP) devices (and perhaps Armada 370)

     drivers/ddr/marvell/a38x
     Supporting Armada 38x devices (and perhaps Armada 39x)

Signed-off-by: Stefan Roese <sr@denx.de>

26 files changed, 5 insertions, 5 deletions

diff --git a/arch/arm/mach-mvebu/include/mach/cpu.h b/arch/arm/mach-mvebu/include/mach/cpu.h
index 4bdb633..8bcdef6 100644
--- a/arch/arm/mach-mvebu/include/mach/cpu.h
+++ b/arch/arm/mach-mvebu/include/mach/cpu.h
@@ -125,7 +125,7 @@ int serdes_phy_config(void);
 /*
  * DDR3 init / training code ported from Marvell bin_hdr. Now
  * available in mainline U-Boot in:
- * drivers/ddr/mvebu/
+ * drivers/ddr/marvell
  */
 int ddr3_init(void);
 #endif /* __ASSEMBLY__ */
diff --git a/arch/arm/mach-mvebu/serdes/axp/high_speed_env_spec.h b/arch/arm/mach-mvebu/serdes/axp/high_speed_env_spec.h
index e5aa1b0..e10574e 100644
--- a/arch/arm/mach-mvebu/serdes/axp/high_speed_env_spec.h
+++ b/arch/arm/mach-mvebu/serdes/axp/high_speed_env_spec.h
@@ -7,7 +7,7 @@
 #ifndef __HIGHSPEED_ENV_SPEC_H
 #define __HIGHSPEED_ENV_SPEC_H
 
-#include "../../../drivers/ddr/mvebu/ddr3_hw_training.h"
+#include "../../../drivers/ddr/marvell/axp/ddr3_hw_training.h"
 
 typedef enum {
 	SERDES_UNIT_UNCONNECTED	= 0x0,
diff --git a/drivers/ddr/mvebu/Makefile b/drivers/ddr/marvell/axp/Makefile
index 50a69ea..50a69ea 100644
--- a/drivers/ddr/mvebu/Makefile
+++ b/drivers/ddr/marvell/axp/Makefile
diff --git a/drivers/ddr/mvebu/ddr3_axp.h b/drivers/ddr/marvell/axp/ddr3_axp.h
index d9e33f7..d9e33f7 100644
--- a/drivers/ddr/mvebu/ddr3_axp.h
+++ b/drivers/ddr/marvell/axp/ddr3_axp.h
diff --git a/drivers/ddr/mvebu/ddr3_axp_config.h b/drivers/ddr/marvell/axp/ddr3_axp_config.h
index 800d2d1..800d2d1 100644
--- a/drivers/ddr/mvebu/ddr3_axp_config.h
+++ b/drivers/ddr/marvell/axp/ddr3_axp_config.h
diff --git a/drivers/ddr/mvebu/ddr3_axp_mc_static.h b/drivers/ddr/marvell/axp/ddr3_axp_mc_static.h
index 2c0e9075..2c0e9075 100644
--- a/drivers/ddr/mvebu/ddr3_axp_mc_static.h
+++ b/drivers/ddr/marvell/axp/ddr3_axp_mc_static.h
diff --git a/drivers/ddr/mvebu/ddr3_axp_training_static.h b/drivers/ddr/marvell/axp/ddr3_axp_training_static.h
index 4e61547..4e61547 100644
--- a/drivers/ddr/mvebu/ddr3_axp_training_static.h
+++ b/drivers/ddr/marvell/axp/ddr3_axp_training_static.h
diff --git a/drivers/ddr/mvebu/ddr3_axp_vars.h b/drivers/ddr/marvell/axp/ddr3_axp_vars.h
index 1b0ab56..1b0ab56 100644
--- a/drivers/ddr/mvebu/ddr3_axp_vars.h
+++ b/drivers/ddr/marvell/axp/ddr3_axp_vars.h
diff --git a/drivers/ddr/mvebu/ddr3_dfs.c b/drivers/ddr/marvell/axp/ddr3_dfs.c
index 9347773..9347773 100644
--- a/drivers/ddr/mvebu/ddr3_dfs.c
+++ b/drivers/ddr/marvell/axp/ddr3_dfs.c
diff --git a/drivers/ddr/mvebu/ddr3_dqs.c b/drivers/ddr/marvell/axp/ddr3_dqs.c
index 71a986d..71a986d 100644
--- a/drivers/ddr/mvebu/ddr3_dqs.c
+++ b/drivers/ddr/marvell/axp/ddr3_dqs.c
diff --git a/drivers/ddr/mvebu/ddr3_hw_training.c b/drivers/ddr/marvell/axp/ddr3_hw_training.c
index a8c5e6a..a8c5e6a 100644
--- a/drivers/ddr/mvebu/ddr3_hw_training.c
+++ b/drivers/ddr/marvell/axp/ddr3_hw_training.c
diff --git a/drivers/ddr/mvebu/ddr3_hw_training.h b/drivers/ddr/marvell/axp/ddr3_hw_training.h
index cffa7c4..cffa7c4 100644
--- a/drivers/ddr/mvebu/ddr3_hw_training.h
+++ b/drivers/ddr/marvell/axp/ddr3_hw_training.h
diff --git a/drivers/ddr/mvebu/ddr3_init.c b/drivers/ddr/marvell/axp/ddr3_init.c
index 11b8591..11b8591 100644
--- a/drivers/ddr/mvebu/ddr3_init.c
+++ b/drivers/ddr/marvell/axp/ddr3_init.c
diff --git a/drivers/ddr/mvebu/ddr3_init.h b/drivers/ddr/marvell/axp/ddr3_init.h
index b259e09..b259e09 100644
--- a/drivers/ddr/mvebu/ddr3_init.h
+++ b/drivers/ddr/marvell/axp/ddr3_init.h
diff --git a/drivers/ddr/mvebu/ddr3_patterns_64bit.h b/drivers/ddr/marvell/axp/ddr3_patterns_64bit.h
index 1b57328..1b57328 100644
--- a/drivers/ddr/mvebu/ddr3_patterns_64bit.h
+++ b/drivers/ddr/marvell/axp/ddr3_patterns_64bit.h
diff --git a/drivers/ddr/mvebu/ddr3_pbs.c b/drivers/ddr/marvell/axp/ddr3_pbs.c
index 00ea3fd..00ea3fd 100644
--- a/drivers/ddr/mvebu/ddr3_pbs.c
+++ b/drivers/ddr/marvell/axp/ddr3_pbs.c
diff --git a/drivers/ddr/mvebu/ddr3_read_leveling.c b/drivers/ddr/marvell/axp/ddr3_read_leveling.c
index 4662bde..4662bde 100644
--- a/drivers/ddr/mvebu/ddr3_read_leveling.c
+++ b/drivers/ddr/marvell/axp/ddr3_read_leveling.c
diff --git a/drivers/ddr/mvebu/ddr3_sdram.c b/drivers/ddr/marvell/axp/ddr3_sdram.c
index 50c1bf8..50c1bf8 100644
--- a/drivers/ddr/mvebu/ddr3_sdram.c
+++ b/drivers/ddr/marvell/axp/ddr3_sdram.c
diff --git a/drivers/ddr/mvebu/ddr3_spd.c b/drivers/ddr/marvell/axp/ddr3_spd.c
index f4f94c5..f4f94c5 100644
--- a/drivers/ddr/mvebu/ddr3_spd.c
+++ b/drivers/ddr/marvell/axp/ddr3_spd.c
diff --git a/drivers/ddr/mvebu/ddr3_write_leveling.c b/drivers/ddr/marvell/axp/ddr3_write_leveling.c
index df3a3df..df3a3df 100644
--- a/drivers/ddr/mvebu/ddr3_write_leveling.c
+++ b/drivers/ddr/marvell/axp/ddr3_write_leveling.c
diff --git a/drivers/ddr/mvebu/xor.c b/drivers/ddr/marvell/axp/xor.c
index 66c96ae..66c96ae 100644
--- a/drivers/ddr/mvebu/xor.c
+++ b/drivers/ddr/marvell/axp/xor.c
diff --git a/drivers/ddr/mvebu/xor.h b/drivers/ddr/marvell/axp/xor.h
index 3536487..3536487 100644
--- a/drivers/ddr/mvebu/xor.h
+++ b/drivers/ddr/marvell/axp/xor.h
diff --git a/drivers/ddr/mvebu/xor_regs.h b/drivers/ddr/marvell/axp/xor_regs.h
index 884aa15..884aa15 100644
--- a/drivers/ddr/mvebu/xor_regs.h
+++ b/drivers/ddr/marvell/axp/xor_regs.h
diff --git a/include/configs/db-mv784mp-gp.h b/include/configs/db-mv784mp-gp.h
index aeddbf9..41e6fdc 100644
--- a/include/configs/db-mv784mp-gp.h
+++ b/include/configs/db-mv784mp-gp.h
@@ -138,7 +138,7 @@
 #define CONFIG_SYS_SPI_U_BOOT_OFFS	0x20000
 
 /* Enable DDR support in SPL (DDR3 training from Marvell bin_hdr) */
-#define CONFIG_SYS_MVEBU_DDR
+#define CONFIG_SYS_MVEBU_DDR_AXP
 #define CONFIG_SPD_EEPROM		0x4e
 
 #endif /* _CONFIG_DB_MV7846MP_GP_H */
diff --git a/include/configs/maxbcm.h b/include/configs/maxbcm.h
index 4826044..0fb117f 100644
--- a/include/configs/maxbcm.h
+++ b/include/configs/maxbcm.h
@@ -108,7 +108,7 @@
 #define CONFIG_SYS_SPI_U_BOOT_OFFS	0x20000
 
 /* Enable DDR support in SPL (DDR3 training from Marvell bin_hdr) */
-#define CONFIG_SYS_MVEBU_DDR
+#define CONFIG_SYS_MVEBU_DDR_AXP
 #define CONFIG_DDR_FIXED_SIZE		(1 << 20)	/* 1GiB */
 
 #endif /* _CONFIG_DB_MV7846MP_GP_H */
diff --git a/scripts/Makefile.spl b/scripts/Makefile.spl
index fd572f4..3c9a9a0 100644
--- a/scripts/Makefile.spl
+++ b/scripts/Makefile.spl
@@ -59,7 +59,7 @@ libs-$(CONFIG_SPL_I2C_SUPPORT) += drivers/i2c/
 libs-$(CONFIG_SPL_GPIO_SUPPORT) += drivers/gpio/
 libs-$(CONFIG_SPL_MMC_SUPPORT) += drivers/mmc/
 libs-$(CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT) += drivers/ddr/fsl/
-libs-$(CONFIG_SYS_MVEBU_DDR) += drivers/ddr/mvebu/
+libs-$(CONFIG_SYS_MVEBU_DDR_AXP) += drivers/ddr/marvell/axp/
 libs-$(CONFIG_SPL_SERIAL_SUPPORT) += drivers/serial/
 libs-$(CONFIG_SPL_SPI_FLASH_SUPPORT) += drivers/mtd/spi/
 libs-$(CONFIG_SPL_SPI_SUPPORT) += drivers/spi/