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authorStephen Warren <swarren@wwwdotorg.org>2016-03-24 22:15:20 -0600
committerTom Rini <trini@konsulko.com>2016-04-01 17:17:42 -0400
commitf031f501efa898ad1eac641cb27079dd6ded306a (patch)
tree6b2380a6118b4e2cc1ce51ce3d8c6762040e98f0
parent95a2ddaea5575492a780cc7bad4335120542d697 (diff)
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rpi: BCM2837 and Raspberry Pi 3 32-bit support
The Raspberry Pi 3 contains a BCM2837 SoC. The BCM2837 is a BCM2836 with the CPU complex swapped out for a quad-core ARMv8. This can operate in 32- or 64-bit mode. 32-bit mode is the current default selected by the VideoCore firmware on the Raspberry Pi 3. This patch adds a 32-bit port of U-Boot for the Raspberry Pi 3. >From U-Boot's perspective, the only delta between the RPi 2 and RPi 3 is a change in usage of the SoC UARTs. On all previous Pis, the PL011 was the only UART in use. The Raspberry Pi 3 adds a Bluetooth module which uses a UART to connect to the SoC. By default, the PL011 is used for this purpose since it has larger FIFOs than the other "mini" UART. However, this can be configured via the VideoCore firmware's config.txt file. This patch hard-codes use of the mini UART in the RPi 3 port. If your system uses the PL011 UART for the console even on the RPi 3, please use the RPi 2 U-Boot port instead. A future change might determine which UART to use at run-time, thus allowing the RPi 2 and RPi 3 (32-bit) ports to be squashed together. The mini UART has some limitations. One externally visible issue in the BCM2837 integration is that the UART divides the SoC's "core clock" to generate the baud rate. The core clock is typically variable, and under control of the VideoCore firmware for thermal management reasons. If the VC FW does modify the core clock rate, UART communication will be corrupted since the baud rate will vary from the expected value. This was not an issue for the PL011 UART, since it is fed by a fixed 3MHz clock. To work around this, the VideoCore firmware can be told not to modify the SoC core clock. However, the only way this can happen and be thermally safe is to limit the core clock to a low/minimum frequency. This leaves performance on the table for use-cases that don't care about a UART console. Consequently, use of the mini UART console must be explicitly requested by entering the following line into config.txt: enable_uart=1 A recent version of the VC firmware is required to ensure that the mini UART is fully and correctly initialized by the VC FW; at least firmware.git 046effa13ebc "firmware: arm_loader: emmc clock depends on core clock See: https://github.com/raspberrypi/firmware/issues/572". Signed-off-by: Stephen Warren <swarren@wwwdotorg.org> Reviewed-by: Tom Rini <trini@konsulko.com>
-rw-r--r--arch/arm/mach-bcm283x/Kconfig22
-rw-r--r--board/raspberrypi/rpi/rpi.c16
-rw-r--r--board/raspberrypi/rpi_3_32b/MAINTAINERS6
-rw-r--r--board/raspberrypi/rpi_3_32b/Makefile7
-rw-r--r--configs/rpi_3_32b_defconfig11
-rw-r--r--include/configs/rpi-common.h9
-rw-r--r--include/configs/rpi_3_32b.h15
7 files changed, 84 insertions, 2 deletions
diff --git a/arch/arm/mach-bcm283x/Kconfig b/arch/arm/mach-bcm283x/Kconfig
index 1f3031d..a4d291d 100644
--- a/arch/arm/mach-bcm283x/Kconfig
+++ b/arch/arm/mach-bcm283x/Kconfig
@@ -6,6 +6,10 @@ config BCM2836
bool "Broadcom BCM2836 SoC support"
depends on ARCH_BCM283X
+config BCM2837
+ bool "Broadcom BCM2837 SoC support"
+ depends on ARCH_BCM283X
+
menu "Broadcom BCM283X family"
depends on ARCH_BCM283X
@@ -50,11 +54,28 @@ config TARGET_RPI_2
select BCM2836
select CPU_V7
+config TARGET_RPI_3_32B
+ bool "Raspberry Pi 3 32-bit build"
+ help
+ Support for all BCM2837-based Raspberry Pi variants, such as
+ the RPi 3 model B, in AArch32 (32-bit) mode.
+
+ This option assumes the VideoCore firmware is configured to use the
+ mini UART (rather than PL011) for the serial console. This is the
+ default on the RPi 3. To enable the UART console, the following non-
+ default option must be present in config.txt: enable_uart=1.
+
+ This option creates a build targetting the ARMv7/AArch32 ISA.
+ select ARMV7_LPAE
+ select BCM2837
+ select CPU_V7
+
endchoice
config SYS_BOARD
default "rpi" if TARGET_RPI
default "rpi_2" if TARGET_RPI_2
+ default "rpi_3_32b" if TARGET_RPI_3_32B
config SYS_VENDOR
default "raspberrypi"
@@ -65,5 +86,6 @@ config SYS_SOC
config SYS_CONFIG_NAME
default "rpi" if TARGET_RPI
default "rpi_2" if TARGET_RPI_2
+ default "rpi_3_32b" if TARGET_RPI_3_32B
endmenu
diff --git a/board/raspberrypi/rpi/rpi.c b/board/raspberrypi/rpi/rpi.c
index d31a79c..20b5cf4 100644
--- a/board/raspberrypi/rpi/rpi.c
+++ b/board/raspberrypi/rpi/rpi.c
@@ -1,5 +1,5 @@
/*
- * (C) Copyright 2012-2013,2015 Stephen Warren
+ * (C) Copyright 2012-2016 Stephen Warren
*
* SPDX-License-Identifier: GPL-2.0
*/
@@ -18,6 +18,7 @@
#include <asm/arch/sdhci.h>
#include <asm/global_data.h>
#include <dm/platform_data/serial_pl01x.h>
+#include <dm/platform_data/serial_bcm283x_mu.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -30,6 +31,7 @@ U_BOOT_DEVICE(bcm2835_gpios) = {
.platdata = &gpio_platdata,
};
+#ifdef CONFIG_PL01X_SERIAL
static const struct pl01x_serial_platdata serial_platdata = {
#ifndef CONFIG_BCM2835
.base = 0x3f201000,
@@ -44,6 +46,18 @@ U_BOOT_DEVICE(bcm2835_serials) = {
.name = "serial_pl01x",
.platdata = &serial_platdata,
};
+#else
+static const struct bcm283x_mu_serial_platdata serial_platdata = {
+ .base = 0x3f215040,
+ .clock = 250000000,
+ .skip_init = true,
+};
+
+U_BOOT_DEVICE(bcm2837_serials) = {
+ .name = "serial_bcm283x_mu",
+ .platdata = &serial_platdata,
+};
+#endif
struct msg_get_arm_mem {
struct bcm2835_mbox_hdr hdr;
diff --git a/board/raspberrypi/rpi_3_32b/MAINTAINERS b/board/raspberrypi/rpi_3_32b/MAINTAINERS
new file mode 100644
index 0000000..bc9df87
--- /dev/null
+++ b/board/raspberrypi/rpi_3_32b/MAINTAINERS
@@ -0,0 +1,6 @@
+RPI_3_32B BOARD
+M: Stephen Warren <swarren@wwwdotorg.org>
+S: Maintained
+F: board/raspberrypi/rpi_3_32b/
+F: include/configs/rpi_3_32b.h
+F: configs/rpi_3_32b_defconfig
diff --git a/board/raspberrypi/rpi_3_32b/Makefile b/board/raspberrypi/rpi_3_32b/Makefile
new file mode 100644
index 0000000..78e2874
--- /dev/null
+++ b/board/raspberrypi/rpi_3_32b/Makefile
@@ -0,0 +1,7 @@
+#
+# (C) Copyright 2012-2016 Stephen Warren <swarren@wwwdotorg.org>
+#
+# SPDX-License-Identifier: GPL-2.0
+#
+
+obj-y := ../rpi/rpi.o
diff --git a/configs/rpi_3_32b_defconfig b/configs/rpi_3_32b_defconfig
new file mode 100644
index 0000000..71a0c28
--- /dev/null
+++ b/configs/rpi_3_32b_defconfig
@@ -0,0 +1,11 @@
+CONFIG_ARM=y
+CONFIG_ARCH_BCM283X=y
+CONFIG_TARGET_RPI_3_32B=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_SYS_PROMPT="U-Boot> "
+# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_GPIO=y
+CONFIG_PHYS_TO_BUS=y
+CONFIG_OF_LIBFDT=y
diff --git a/include/configs/rpi-common.h b/include/configs/rpi-common.h
index 89aee0a..5904a32 100644
--- a/include/configs/rpi-common.h
+++ b/include/configs/rpi-common.h
@@ -1,5 +1,5 @@
/*
- * (C) Copyright 2012,2015 Stephen Warren
+ * (C) Copyright 2012-2016 Stephen Warren
*
* SPDX-License-Identifier: GPL-2.0
*/
@@ -24,6 +24,9 @@
* We don't define a machine type for bcm2709/bcm2836 since the RPi Foundation
* chose to use someone else's previously registered machine ID (3139, MX51_GGC)
* rather than obtaining a valid ID:-/
+ *
+ * For the bcm2837, hopefully a machine type is not needed, since everything
+ * is DT.
*/
#ifdef CONFIG_BCM2835
#define CONFIG_MACH_TYPE MACH_TYPE_BCM2708
@@ -94,7 +97,11 @@
#endif
/* Console UART */
+#ifdef CONFIG_BCM2837
+#define CONFIG_BCM283X_MU_SERIAL
+#else
#define CONFIG_PL01X_SERIAL
+#endif
#define CONFIG_CONS_INDEX 0
#define CONFIG_BAUDRATE 115200
diff --git a/include/configs/rpi_3_32b.h b/include/configs/rpi_3_32b.h
new file mode 100644
index 0000000..c00379b
--- /dev/null
+++ b/include/configs/rpi_3_32b.h
@@ -0,0 +1,15 @@
+/*
+ * (C) Copyright 2012-2016 Stephen Warren <swarren@wwwdotorg.org>
+ *
+ * SPDX-License-Identifier: GPL-2.0
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+#define CONFIG_SKIP_LOWLEVEL_INIT
+#define CONFIG_SYS_CACHELINE_SIZE 64
+
+#include "rpi-common.h"
+
+#endif