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| author | Fabio Estevam <fabio.estevam@freescale.com> | 2012-09-18 09:27:49 +0000 |
|---|---|---|
| committer | Tom Rini <trini@ti.com> | 2012-10-15 11:54:08 -0700 |
| commit | e72d617860f7833756acddaf09ac28a3d8986d4c (patch) | |
| tree | 1bc3cd7989e459774f9cc341f8278f171bbb702c | |
| parent | a0d21fc01ac51d5f86cd5bd195dd524940f49223 (diff) | |
| download | u-boot-imx-e72d617860f7833756acddaf09ac28a3d8986d4c.zip u-boot-imx-e72d617860f7833756acddaf09ac28a3d8986d4c.tar.gz u-boot-imx-e72d617860f7833756acddaf09ac28a3d8986d4c.tar.bz2 | |
mx6qsabresd: Add 8-bit USDHC support
USDHC3 has 8 pins wired in mx6qsabresd. Configure the extra pins.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| -rw-r--r-- | board/freescale/mx6qsabresd/mx6qsabresd.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/board/freescale/mx6qsabresd/mx6qsabresd.c b/board/freescale/mx6qsabresd/mx6qsabresd.c index 069c664..03a6857 100644 --- a/board/freescale/mx6qsabresd/mx6qsabresd.c +++ b/board/freescale/mx6qsabresd/mx6qsabresd.c @@ -93,6 +93,10 @@ iomux_v3_cfg_t usdhc3_pads[] = { MX6Q_PAD_SD3_DAT1__USDHC3_DAT1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), MX6Q_PAD_SD3_DAT2__USDHC3_DAT2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), MX6Q_PAD_SD3_DAT3__USDHC3_DAT3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6Q_PAD_SD3_DAT4__USDHC3_DAT4 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6Q_PAD_SD3_DAT5__USDHC3_DAT5 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6Q_PAD_SD3_DAT6__USDHC3_DAT6 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6Q_PAD_SD3_DAT7__USDHC3_DAT7 | MUX_PAD_CTRL(USDHC_PAD_CTRL), MX6Q_PAD_NANDF_D0__GPIO_2_0 | MUX_PAD_CTRL(NO_PAD_CTRL), /* CD */ }; |