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authorFabio Estevam <fabio.estevam@freescale.com>2012-10-02 11:20:12 +0000
committerStefano Babic <sbabic@denx.de>2012-10-16 12:35:11 +0200
commitdce67bd548a8c21bf0998806825b0b90fce0e48d (patch)
treee3ac439e1a4e47bdbdb817a0e3e0faed71857f7a
parent903e779c5537e1c87470f911a178e4463984e562 (diff)
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mx6qsabreauto: Pass the board revision to the kernel
The kernel from Freescale expects that the bootloader passes the board revision. Read the board revision and pass it via get_board_rev(). Without passing the board revision the kernel does not operate properly as the initialization of peripherals are different in revA versus revB boards. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
-rw-r--r--arch/arm/include/asm/arch-mx6/imx-regs.h6
-rw-r--r--board/freescale/mx6qsabreauto/mx6qsabreauto.c48
2 files changed, 52 insertions, 2 deletions
diff --git a/arch/arm/include/asm/arch-mx6/imx-regs.h b/arch/arm/include/asm/arch-mx6/imx-regs.h
index dc737ba..09ab010 100644
--- a/arch/arm/include/asm/arch-mx6/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx6/imx-regs.h
@@ -200,6 +200,12 @@ struct src {
u32 gpr10;
};
+/* OCOTP Registers */
+struct ocotp_regs {
+ u32 reserved[0x198];
+ u32 gp1; /* 0x660 */
+};
+
/* GPR3 bitfields */
#define IOMUXC_GPR3_GPU_DBG_OFFSET 29
#define IOMUXC_GPR3_GPU_DBG_MASK (3<<IOMUXC_GPR3_GPU_DBG_OFFSET)
diff --git a/board/freescale/mx6qsabreauto/mx6qsabreauto.c b/board/freescale/mx6qsabreauto/mx6qsabreauto.c
index 17ff8ff..bd87901 100644
--- a/board/freescale/mx6qsabreauto/mx6qsabreauto.c
+++ b/board/freescale/mx6qsabreauto/mx6qsabreauto.c
@@ -30,6 +30,8 @@
#include <fsl_esdhc.h>
#include <miiphy.h>
#include <netdev.h>
+#include <asm/arch/sys_proto.h>
+
DECLARE_GLOBAL_DATA_PTR;
#define UART_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
@@ -165,9 +167,38 @@ int board_eth_init(bd_t *bis)
return 0;
}
+#define BOARD_REV_B 0x200
+#define BOARD_REV_A 0x100
+
+static int mx6sabre_rev(void)
+{
+ /*
+ * Get Board ID information from OCOTP_GP1[15:8]
+ * i.MX6Q ARD RevA: 0x01
+ * i.MX6Q ARD RevB: 0x02
+ */
+ struct ocotp_regs *ocotp = (struct ocotp_regs *)OCOTP_BASE_ADDR;
+ int reg = readl(&ocotp->gp1);
+ int ret;
+
+ switch (reg >> 8 & 0x0F) {
+ case 0x02:
+ ret = BOARD_REV_B;
+ break;
+ case 0x01:
+ default:
+ ret = BOARD_REV_A;
+ break;
+ }
+
+ return ret;
+}
+
u32 get_board_rev(void)
{
- return 0x63000;
+ int rev = mx6sabre_rev();
+
+ return (get_cpu_rev() & ~(0xF << 8)) | rev;
}
int board_early_init_f(void)
@@ -187,7 +218,20 @@ int board_init(void)
int checkboard(void)
{
- puts("Board: MX6Q-Sabreauto\n");
+ int rev = mx6sabre_rev();
+ char *revname;
+
+ switch (rev) {
+ case BOARD_REV_B:
+ revname = "B";
+ break;
+ case BOARD_REV_A:
+ default:
+ revname = "A";
+ break;
+ }
+
+ printf("Board: MX6Q-Sabreauto rev%s\n", revname);
return 0;
}