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authorShaohui Xie <Shaohui.Xie@nxp.com>2016-03-25 11:36:51 +0800
committerYork Sun <york.sun@nxp.com>2016-04-06 08:34:55 -0700
commitce96ba4b84ceec7d0d3ed3318d25d7f1286a5535 (patch)
treebe61f9880cafe24d5ba2e34a608df276bdf216d3
parent9101a68c1577e875c350b5095effc8db1266b515 (diff)
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armv8: ls1043aqds: make sure fixed-link property is big endian
When setting fixed-link property to DTS, the values should be converted with using cpu_to_fdt32 so that to have correct value on little endian Soc. Signed-off-by: Shaohui Xie <Shaohui.Xie@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
-rw-r--r--board/freescale/ls1043aqds/eth.c12
1 files changed, 6 insertions, 6 deletions
diff --git a/board/freescale/ls1043aqds/eth.c b/board/freescale/ls1043aqds/eth.c
index 67b4afe..bf26376 100644
--- a/board/freescale/ls1043aqds/eth.c
+++ b/board/freescale/ls1043aqds/eth.c
@@ -176,9 +176,9 @@ void board_ft_fman_fixup_port(void *fdt, char *compat, phys_addr_t addr,
} else if (fm_info_get_enet_if(port) ==
PHY_INTERFACE_MODE_SGMII_2500) {
/* 2.5G SGMII interface */
- f_link.phy_id = port;
- f_link.duplex = 1;
- f_link.link_speed = 1000;
+ f_link.phy_id = cpu_to_fdt32(port);
+ f_link.duplex = cpu_to_fdt32(1);
+ f_link.link_speed = cpu_to_fdt32(1000);
f_link.pause = 0;
f_link.asym_pause = 0;
/* no PHY for 2.5G SGMII */
@@ -241,9 +241,9 @@ void board_ft_fman_fixup_port(void *fdt, char *compat, phys_addr_t addr,
} else if (fm_info_get_enet_if(port) == PHY_INTERFACE_MODE_XGMII &&
port == FM1_10GEC1) {
/* XFI interface */
- f_link.phy_id = port;
- f_link.duplex = 1;
- f_link.link_speed = 10000;
+ f_link.phy_id = cpu_to_fdt32(port);
+ f_link.duplex = cpu_to_fdt32(1);
+ f_link.link_speed = cpu_to_fdt32(10000);
f_link.pause = 0;
f_link.asym_pause = 0;
/* no PHY for XFI */