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authorHeiko Schocher <hs@pollux.denx.de>2006-04-11 14:53:29 +0200
committerHeiko Schocher <hs@pollux.denx.de>2006-04-11 14:53:29 +0200
commitad88297e2f14220f34417d1304d256285887aed4 (patch)
tree8539431105a49ca7918ac58af5d743289c193432
parentbb74140defaff27ccd4c7f8ecfec3244f5890777 (diff)
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* Fix dbau1x00 Board
- Fix dbau1x00 boards broken by dbau1550 patch PLL:s were not set for boards other than 1550. Flash CFI caused card to hang due to undefined CFG_FLASH_BANKS_LIST. Default boot is now bootp for cards other than 1550. Patch by Thomas Lange Aug 10 2005
-rw-r--r--CHANGELOG6
-rw-r--r--board/dbau1x00/lowlevel_init.S5
-rw-r--r--include/configs/dbau1x00.h7
3 files changed, 13 insertions, 5 deletions
diff --git a/CHANGELOG b/CHANGELOG
index 216cb63..e006f0e 100644
--- a/CHANGELOG
+++ b/CHANGELOG
@@ -1,6 +1,12 @@
======================================================================
Changes since U-Boot 1.1.4:
======================================================================
+* Fix dbau1x00 Board
+ - Fix dbau1x00 boards broken by dbau1550 patch
+ PLL:s were not set for boards other than 1550.
+ Flash CFI caused card to hang due to undefined CFG_FLASH_BANKS_LIST.
+ Default boot is now bootp for cards other than 1550.
+ Patch by Thomas Lange Aug 10 2005
* Fixes common/cmd_flash.c:
diff --git a/board/dbau1x00/lowlevel_init.S b/board/dbau1x00/lowlevel_init.S
index 7afd584..14a7846 100644
--- a/board/dbau1x00/lowlevel_init.S
+++ b/board/dbau1x00/lowlevel_init.S
@@ -185,6 +185,8 @@ tlbloop:
bne t0, t2, tlbloop
nop
+#endif /* CONFIG_DBAU1550 */
+
/* First setup pll:s to make serial work ok */
/* We have a 12 MHz crystal */
li t0, SYS_CPUPLL
@@ -205,6 +207,7 @@ tlbloop:
sw t1, 0(t0) /* aux pll */
sync
+#ifdef CONFIG_DBAU1550
/* Static memory controller */
/* RCE0 - can not change while fetching, do so from icache */
move t2, ra /* Store return address */
@@ -237,7 +240,7 @@ noCacheJump:
sw t1, 0(t0)
#else /* CONFIG_DBAU1550 */
li t0, MEM_STTIME0
- li t1, 0x00014C0F
+ li t1, 0x040181D7
sw t1, 0(t0)
/* RCE0 AMD 29LV640M MirrorBit Flash */
diff --git a/include/configs/dbau1x00.h b/include/configs/dbau1x00.h
index 0a10e3c..4cc5085 100644
--- a/include/configs/dbau1x00.h
+++ b/include/configs/dbau1x00.h
@@ -81,8 +81,7 @@
CFG_CMD_MII | CFG_CMD_RUN | CFG_CMD_BDI | CFG_CMD_BEDBUG | \
CFG_CMD_NFS | CFG_CMD_ELF | CFG_CMD_PCMCIA | CFG_CMD_I2C))
#else /* CONFIG_DBAU1550 */
-/* Boot from Compact flash partition 2 as default */
-#define CONFIG_BOOTCOMMAND "ide reset;disk 0x81000000 0:2;bootm"
+#define CONFIG_BOOTCOMMAND "bootp;bootm"
#define CONFIG_COMMANDS ((CONFIG_CMD_DFL | CFG_CMD_IDE | CFG_CMD_DHCP | CFG_CMD_ELF) & \
~(CFG_CMD_ENV | CFG_CMD_FAT | CFG_CMD_FLASH | CFG_CMD_FPGA | \
@@ -133,8 +132,6 @@
#define PHYS_FLASH_1 0xb8000000 /* Flash Bank #1 */
#define PHYS_FLASH_2 0xbc000000 /* Flash Bank #2 */
-#define CFG_FLASH_BANKS_LIST {PHYS_FLASH_1, PHYS_FLASH_2}
-
#else /* CONFIG_DBAU1550 */
#define CFG_MAX_FLASH_BANKS 2 /* max number of memory banks */
@@ -145,6 +142,8 @@
#endif /* CONFIG_DBAU1550 */
+#define CFG_FLASH_BANKS_LIST {PHYS_FLASH_1, PHYS_FLASH_2}
+
#define CFG_FLASH_CFI 1
#define CFG_FLASH_CFI_DRIVER 1