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authorSimon Glass <sjg@chromium.org>2016-01-17 16:11:30 -0700
committerBin Meng <bmeng.cn@gmail.com>2016-01-24 12:08:17 +0800
commitac643e0363b4fe32e2742ede8084fc9999bd0bfb (patch)
treeaf422f0ea01c1c6237d55be758723b57f008567d
parent8b674418e0250aae9748d9b53fe4c9d9607b7e36 (diff)
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x86: Bring up northbridge, pch and lpc after the CPUs
These devices currently need to be inited early in boot. Once we have the init in the right places (with each device doing its own init and no problems with ordering) we should be able to remove this. For now it is needed to keep things working. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
-rw-r--r--arch/x86/cpu/cpu.c20
1 files changed, 18 insertions, 2 deletions
diff --git a/arch/x86/cpu/cpu.c b/arch/x86/cpu/cpu.c
index 3c812e9..6c3a748 100644
--- a/arch/x86/cpu/cpu.c
+++ b/arch/x86/cpu/cpu.c
@@ -709,8 +709,24 @@ static int x86_init_cpus(void)
int cpu_init_r(void)
{
- if (ll_boot_init())
- return x86_init_cpus();
+ struct udevice *dev;
+ int ret;
+
+ if (!ll_boot_init())
+ return 0;
+
+ ret = x86_init_cpus();
+ if (ret)
+ return ret;
+
+ /*
+ * Set up the northbridge, PCH and LPC if available. Note that these
+ * may have had some limited pre-relocation init if they were probed
+ * before relocation, but this is post relocation.
+ */
+ uclass_first_device(UCLASS_NORTHBRIDGE, &dev);
+ uclass_first_device(UCLASS_PCH, &dev);
+ uclass_first_device(UCLASS_LPC, &dev);
return 0;
}