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authorMarek Vasut <marek.vasut@gmail.com>2011-10-21 14:17:27 +0000
committerWolfgang Denk <wd@denx.de>2011-10-27 23:54:01 +0200
commit7f2229b5c59675d688652d02adc636a4db8b0568 (patch)
treeda4bde54635c122fb142fb2ea7f6598e09e0b4cc
parentcd84b1fabf933b54b204dffa973757a784c69229 (diff)
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GCC4.6: Squash warnings in mpc86xx/interrupts.c
interrupts.c: In function 'interrupt_init_cpu': interrupts.c:62: warning: format '%d' expects type 'int', but argument 2 has type 'long unsigned int' interrupts.c:69: warning: format '%x' expects type 'unsigned int', but argument 2 has type 'volatile uint *' interrupts.c:72: warning: format '%x' expects type 'unsigned int', but argument 2 has type 'volatile uint *' interrupts.c:75: warning: format '%x' expects type 'unsigned int', but argument 2 has type 'volatile uint *' interrupts.c:79: warning: format '%x' expects type 'unsigned int', but argument 2 has type 'volatile uint *' interrupts.c:83: warning: format '%x' expects type 'unsigned int', but argument 2 has type 'volatile uint *' Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Mike Frysinger <vapier@gentoo.org>
-rw-r--r--arch/powerpc/cpu/mpc86xx/interrupts.c12
1 files changed, 6 insertions, 6 deletions
diff --git a/arch/powerpc/cpu/mpc86xx/interrupts.c b/arch/powerpc/cpu/mpc86xx/interrupts.c
index 14821f4..aff1f6d 100644
--- a/arch/powerpc/cpu/mpc86xx/interrupts.c
+++ b/arch/powerpc/cpu/mpc86xx/interrupts.c
@@ -59,28 +59,28 @@ int interrupt_init_cpu(unsigned long *decrementer_count)
pic->gcr = MPC86xx_PICGCR_MODE;
*decrementer_count = get_tbclk() / CONFIG_SYS_HZ;
- debug("interrupt init: tbclk() = %d MHz, decrementer_count = %ld\n",
+ debug("interrupt init: tbclk() = %ld MHz, decrementer_count = %ld\n",
(get_tbclk() / 1000000),
*decrementer_count);
#ifdef CONFIG_INTERRUPTS
pic->iivpr1 = 0x810001; /* 50220 enable mcm interrupts */
- debug("iivpr1@%x = %x\n", &pic->iivpr1, pic->iivpr1);
+ debug("iivpr1@%p = %x\n", &pic->iivpr1, pic->iivpr1);
pic->iivpr2 = 0x810002; /* 50240 enable ddr interrupts */
- debug("iivpr2@%x = %x\n", &pic->iivpr2, pic->iivpr2);
+ debug("iivpr2@%p = %x\n", &pic->iivpr2, pic->iivpr2);
pic->iivpr3 = 0x810003; /* 50260 enable lbc interrupts */
- debug("iivpr3@%x = %x\n", &pic->iivpr3, pic->iivpr3);
+ debug("iivpr3@%p = %x\n", &pic->iivpr3, pic->iivpr3);
#if defined(CONFIG_PCI1) || defined(CONFIG_PCIE1)
pic->iivpr8 = 0x810008; /* enable pcie1 interrupts */
- debug("iivpr8@%x = %x\n", &pic->iivpr8, pic->iivpr8);
+ debug("iivpr8@%p = %x\n", &pic->iivpr8, pic->iivpr8);
#endif
#if defined(CONFIG_PCI2) || defined(CONFIG_PCIE2)
pic->iivpr9 = 0x810009; /* enable pcie2 interrupts */
- debug("iivpr9@%x = %x\n", &pic->iivpr9, pic->iivpr9);
+ debug("iivpr9@%p = %x\n", &pic->iivpr9, pic->iivpr9);
#endif
pic->ctpr = 0; /* 40080 clear current task priority register */