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| author | Ed Swarthout <Ed.Swarthout@freescale.com> | 2008-10-29 09:21:44 -0500 |
|---|---|---|
| committer | Andrew Fleming-AFLEMING <afleming@freescale.com> | 2008-12-03 22:47:19 -0600 |
| commit | 7008d26a40a76f90cae5824c812cfed449fb97b8 (patch) | |
| tree | c062c63bcb707b5424839622ed2b667da9b51699 | |
| parent | dd332e18d082de75eca3fc2c7c778f5d4571a096 (diff) | |
| download | u-boot-imx-7008d26a40a76f90cae5824c812cfed449fb97b8.zip u-boot-imx-7008d26a40a76f90cae5824c812cfed449fb97b8.tar.gz u-boot-imx-7008d26a40a76f90cae5824c812cfed449fb97b8.tar.bz2 | |
fsl ddr skip interleaving if not supported.
Removed while(1) hang if memctl_intlv_ctl is set wrong.
Remove embedded tabs from strings.
Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Acked-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Andy Fleming <afleming@freescale.com>
| -rw-r--r-- | cpu/mpc8xxx/ddr/main.c | 9 | ||||
| -rw-r--r-- | cpu/mpc8xxx/ddr/options.c | 20 |
2 files changed, 17 insertions, 12 deletions
diff --git a/cpu/mpc8xxx/ddr/main.c b/cpu/mpc8xxx/ddr/main.c index 21a16d9..f1ad132 100644 --- a/cpu/mpc8xxx/ddr/main.c +++ b/cpu/mpc8xxx/ddr/main.c @@ -475,9 +475,14 @@ phys_size_t fsl_ddr_sdram(void) */ memctl_interleaved = 1; } else { - printf("Error: memctl interleaving not " + printf("Warning: memctl interleaving not " "properly configured on all controllers\n"); - while (1); + memctl_interleaved = 0; + for (i = 0; i < CONFIG_NUM_DDR_CONTROLLERS; i++) + info.memctl_opts[i].memctl_interleaving = 0; + debug("Recomputing with memctl_interleaving off.\n"); + total_memory = fsl_ddr_compute(&info, + STEP_ASSIGN_ADDRESSES); } } diff --git a/cpu/mpc8xxx/ddr/options.c b/cpu/mpc8xxx/ddr/options.c index 714e88d..af7f73a 100644 --- a/cpu/mpc8xxx/ddr/options.c +++ b/cpu/mpc8xxx/ddr/options.c @@ -197,10 +197,10 @@ unsigned int populate_memctl_options(int all_DIMMs_registered, */ if ((p = getenv("memctl_intlv_ctl")) != NULL) { if (pdimm[0].n_ranks == 0) { - printf("There is no rank on CS0. Because only rank on \ - CS0 and ranks chip-select interleaved with CS0\ - are controller interleaved, force non memory \ - controller interleaving\n"); + printf("There is no rank on CS0. Because only rank on " + "CS0 and ranks chip-select interleaved with CS0" + " are controller interleaved, force non memory " + "controller interleaving\n"); popts->memctl_interleaving = 0; } else { popts->memctl_interleaving = 1; @@ -239,22 +239,22 @@ unsigned int populate_memctl_options(int all_DIMMs_registered, case FSL_DDR_CS0_CS1: if (pdimm[0].n_ranks != 2) { popts->ba_intlv_ctl = 0; - printf("No enough bank(chip-select) for \ - CS0+CS1, force non-interleaving!\n"); + printf("Not enough bank(chip-select) for " + "CS0+CS1, force non-interleaving!\n"); } break; case FSL_DDR_CS2_CS3: if (pdimm[1].n_ranks !=2){ popts->ba_intlv_ctl = 0; - printf("No enough bank(CS) for CS2+CS3, \ - force non-interleaving!\n"); + printf("Not enough bank(CS) for CS2+CS3, " + "force non-interleaving!\n"); } break; case FSL_DDR_CS0_CS1_AND_CS2_CS3: if ((pdimm[0].n_ranks != 2)||(pdimm[1].n_ranks != 2)) { popts->ba_intlv_ctl = 0; - printf("No enough bank(CS) for CS0+CS1 or \ - CS2+CS3, force non-interleaving!\n"); + printf("Not enough bank(CS) for CS0+CS1 or " + "CS2+CS3, force non-interleaving!\n"); } break; default: |