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authorStefan Roese <sr@denx.de>2007-04-29 16:34:10 +0200
committerStefan Roese <sr@denx.de>2007-04-29 16:34:10 +0200
commit6f69bbc8f33f03f6a1adf845101c15a9917ff5f5 (patch)
tree0d3041d3f1c43b91b1ccdf5b447f0752210bc115
parent8b39501d28754e72726ce7fb02310e56dbdf116a (diff)
parent37ed6cdd4159195bfad68d8a237f6adda8f482cb (diff)
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Merge with /home/stefan/git/u-boot/u-boot-ppc4xx
-rw-r--r--cpu/ppc4xx/4xx_enet.c30
1 files changed, 21 insertions, 9 deletions
diff --git a/cpu/ppc4xx/4xx_enet.c b/cpu/ppc4xx/4xx_enet.c
index cf56581..be4e824 100644
--- a/cpu/ppc4xx/4xx_enet.c
+++ b/cpu/ppc4xx/4xx_enet.c
@@ -339,29 +339,41 @@ int ppc_4xx_eth_setup_bridge(int devnum, bd_t * bis)
int ppc_4xx_eth_setup_bridge(int devnum, bd_t * bis)
{
unsigned long zmiifer=0x0;
+ unsigned long pfc1;
- /*
- * Right now only 2*RGMII is supported. Please extend when needed.
- * sr - 2006-08-29
- */
- switch (1) {
- case 0:
+ mfsdr(sdr_pfc1, pfc1);
+ pfc1 &= SDR0_PFC1_SELECT_MASK;
+
+ switch (pfc1) {
+ case SDR0_PFC1_SELECT_CONFIG_2:
/* 1 x GMII port */
out32 (ZMII_FER, 0x00);
out32 (RGMII_FER, 0x00000037);
bis->bi_phymode[0] = BI_PHYMODE_GMII;
bis->bi_phymode[1] = BI_PHYMODE_NONE;
break;
- case 1:
+ case SDR0_PFC1_SELECT_CONFIG_4:
/* 2 x RGMII ports */
out32 (ZMII_FER, 0x00);
out32 (RGMII_FER, 0x00000055);
bis->bi_phymode[0] = BI_PHYMODE_RGMII;
bis->bi_phymode[1] = BI_PHYMODE_RGMII;
break;
- case 2:
+ case SDR0_PFC1_SELECT_CONFIG_6:
/* 2 x SMII ports */
-
+ out32 (ZMII_FER,
+ ((ZMII_FER_SMII) << ZMII_FER_V(0)) |
+ ((ZMII_FER_SMII) << ZMII_FER_V(1)));
+ out32 (RGMII_FER, 0x00000000);
+ bis->bi_phymode[0] = BI_PHYMODE_SMII;
+ bis->bi_phymode[1] = BI_PHYMODE_SMII;
+ break;
+ case SDR0_PFC1_SELECT_CONFIG_1_2:
+ /* only 1 x MII supported */
+ out32 (ZMII_FER, (ZMII_FER_MII) << ZMII_FER_V(0));
+ out32 (RGMII_FER, 0x00000000);
+ bis->bi_phymode[0] = BI_PHYMODE_MII;
+ bis->bi_phymode[1] = BI_PHYMODE_NONE;
break;
default:
break;