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author | Otavio Salvador <otavio@ossystems.com.br> | 2015-07-23 11:02:21 -0300 |
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committer | Stefano Babic <sbabic@denx.de> | 2015-07-26 12:21:58 +0200 |
commit | 6b3496f7babd0d1b1c30eb1b444246fc7b733a3b (patch) | |
tree | d05202c003810ebc9c0332c44c1437967839f5e0 | |
parent | d6ec45da301ffa865ea8f9a9a481d49dfdb9b24f (diff) | |
download | u-boot-imx-6b3496f7babd0d1b1c30eb1b444246fc7b733a3b.zip u-boot-imx-6b3496f7babd0d1b1c30eb1b444246fc7b733a3b.tar.gz u-boot-imx-6b3496f7babd0d1b1c30eb1b444246fc7b733a3b.tar.bz2 |
cgtqmx6eval: Staticize when possible
Declare 'static' when possible.
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
-rw-r--r-- | board/congatec/cgtqmx6eval/cgtqmx6eval.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/board/congatec/cgtqmx6eval/cgtqmx6eval.c b/board/congatec/cgtqmx6eval/cgtqmx6eval.c index 7492534..eb6395a 100644 --- a/board/congatec/cgtqmx6eval/cgtqmx6eval.c +++ b/board/congatec/cgtqmx6eval/cgtqmx6eval.c @@ -34,12 +34,12 @@ int dram_init(void) return 0; } -iomux_v3_cfg_t const uart2_pads[] = { +static iomux_v3_cfg_t const uart2_pads[] = { MX6_PAD_EIM_D26__UART2_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL), MX6_PAD_EIM_D27__UART2_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL), }; -iomux_v3_cfg_t const usdhc2_pads[] = { +static iomux_v3_cfg_t const usdhc2_pads[] = { MX6_PAD_SD2_CLK__SD2_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), MX6_PAD_SD2_CMD__SD2_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), MX6_PAD_SD2_DAT0__SD2_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), @@ -49,7 +49,7 @@ iomux_v3_cfg_t const usdhc2_pads[] = { MX6_PAD_GPIO_4__GPIO1_IO04 | MUX_PAD_CTRL(USDHC_PAD_CTRL), }; -iomux_v3_cfg_t const usdhc4_pads[] = { +static iomux_v3_cfg_t const usdhc4_pads[] = { MX6_PAD_SD4_CLK__SD4_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), MX6_PAD_SD4_CMD__SD4_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), MX6_PAD_SD4_DAT0__SD4_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), @@ -69,7 +69,7 @@ static void setup_iomux_uart(void) } #ifdef CONFIG_FSL_ESDHC -struct fsl_esdhc_cfg usdhc_cfg[] = { +static struct fsl_esdhc_cfg usdhc_cfg[] = { {USDHC2_BASE_ADDR}, {USDHC4_BASE_ADDR}, }; |