diff options
| author | Ye Li <ye.li@nxp.com> | 2017-04-05 17:09:39 +0800 |
|---|---|---|
| committer | Ye Li <ye.li@nxp.com> | 2017-04-05 19:48:59 +0800 |
| commit | 66978bee57316f3a57d61b069e2168c6e39d1bbf (patch) | |
| tree | a23fcd3bc02d97048637c8d9ba7f911a327c3caf | |
| parent | 6bdecfc3fddb5998d91f49f991e66ae46ef4486b (diff) | |
| download | u-boot-imx-66978bee57316f3a57d61b069e2168c6e39d1bbf.zip u-boot-imx-66978bee57316f3a57d61b069e2168c6e39d1bbf.tar.gz u-boot-imx-66978bee57316f3a57d61b069e2168c6e39d1bbf.tar.bz2 | |
MLK-14621 fsl_qspi: Set endianness for i.MX platforms
The endianness is not set at qspi driver initialization. So if we don't
boot from QSPI, we will get wrong endianness when accessing from AHB address
directly.
Signed-off-by: Ye Li <ye.li@nxp.com>
| -rw-r--r-- | drivers/spi/fsl_qspi.c | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/drivers/spi/fsl_qspi.c b/drivers/spi/fsl_qspi.c index 2d1338f..c27807d 100644 --- a/drivers/spi/fsl_qspi.c +++ b/drivers/spi/fsl_qspi.c @@ -924,6 +924,11 @@ struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs, qspi->slave.max_write_size = TX_BUFFER_SIZE; mcr_val = qspi_read32(qspi->priv.flags, ®s->mcr); + + /* Set endianness to LE for i.mx */ + if (is_mx7() || is_mx6() || is_mx7ulp()) + mcr_val = QSPI_MCR_END_CFD_LE; + qspi_write32(qspi->priv.flags, ®s->mcr, QSPI_MCR_RESERVED_MASK | QSPI_MCR_MDIS_MASK | (mcr_val & QSPI_MCR_END_CFD_MASK)); @@ -1051,6 +1056,11 @@ static int fsl_qspi_probe(struct udevice *bus) priv->num_chipselect = plat->num_chipselect; mcr_val = qspi_read32(priv->flags, &priv->regs->mcr); + + /* Set endianness to LE for i.mx */ + if (is_mx7() || is_mx6() || is_mx7ulp()) + mcr_val = QSPI_MCR_END_CFD_LE; + qspi_write32(priv->flags, &priv->regs->mcr, QSPI_MCR_RESERVED_MASK | QSPI_MCR_MDIS_MASK | (mcr_val & QSPI_MCR_END_CFD_MASK)); |