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| author | Ye Li <ye.li@nxp.com> | 2017-03-17 15:38:43 +0800 |
|---|---|---|
| committer | Ye Li <ye.li@nxp.com> | 2017-04-05 19:48:57 +0800 |
| commit | 65e74eb0b354cb01c8422f30f9e14dead42201b9 (patch) | |
| tree | 71dab4e16f155874ba63fa6aa8eaa04185c662a4 | |
| parent | 79e968112ebeeb4c656263a434f6fbffc8f533d9 (diff) | |
| download | u-boot-imx-65e74eb0b354cb01c8422f30f9e14dead42201b9.zip u-boot-imx-65e74eb0b354cb01c8422f30f9e14dead42201b9.tar.gz u-boot-imx-65e74eb0b354cb01c8422f30f9e14dead42201b9.tar.bz2 | |
MLK-14483 mx7ulp: Fix SPLL/APLL clock rate calculation issue
The num/denom is a float value, but in the calculation it is convert
to integer 0, and cause the result wrong.
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit 4a8f51499ca098637e9ee2036066374d34458865)
| -rw-r--r-- | arch/arm/cpu/armv7/mx7ulp/scg.c | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/arch/arm/cpu/armv7/mx7ulp/scg.c b/arch/arm/cpu/armv7/mx7ulp/scg.c index d759d72..77ab1a9 100644 --- a/arch/arm/cpu/armv7/mx7ulp/scg.c +++ b/arch/arm/cpu/armv7/mx7ulp/scg.c @@ -505,7 +505,9 @@ u32 decode_pll(enum pll_clocks pll) num = readl(&scg1_regs->spllnum); denom = readl(&scg1_regs->splldenom); - return (infreq / pre_div) * (mult + num / denom); + infreq = infreq / pre_div; + + return infreq * mult + infreq * num / denom; case PLL_A7_APLL: reg = readl(&scg1_regs->apllcsr); @@ -532,7 +534,9 @@ u32 decode_pll(enum pll_clocks pll) num = readl(&scg1_regs->apllnum); denom = readl(&scg1_regs->aplldenom); - return (infreq / pre_div) * (mult + num / denom); + infreq = infreq / pre_div; + + return infreq * mult + infreq * num / denom; case PLL_USB: reg = readl(&scg1_regs->upllcsr); |