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authorMarkus Niebel <Markus.Niebel@tqs.de>2014-02-17 17:33:17 +0100
committerJagannadha Sutradharudu Teki <jaganna@xilinx.com>2014-02-18 22:29:26 +0530
commit5d584ccec106f8919ce39562e062d822770513b7 (patch)
tree41e9261dec0d4d02b4c5fc65fbec8eb190b6b097
parentd7cbcc762ea88ad20e9005a85bf7d55939b5e9d2 (diff)
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spi: spi-mxc: implement clk control for ECSPI to fix SPI_MODE_3
SPI_MODE_3 requires clk high when inactive. The SCLK_CTL field of the config reg was not configured in case of CPOL. Fix configuration so that SPI_MODE_3 which uses CPOL configures the clk line to be high in inactive state. Signed-off-by: Markus Niebel <Markus.Niebel@tqs.de> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
-rw-r--r--drivers/spi/mxc_spi.c9
1 files changed, 7 insertions, 2 deletions
diff --git a/drivers/spi/mxc_spi.c b/drivers/spi/mxc_spi.c
index 95dd03f..f3f029d 100644
--- a/drivers/spi/mxc_spi.c
+++ b/drivers/spi/mxc_spi.c
@@ -115,7 +115,8 @@ static s32 spi_cfg_mxc(struct mxc_spi_slave *mxcs, unsigned int cs,
{
u32 clk_src = mxc_get_clock(MXC_CSPI_CLK);
s32 reg_ctrl, reg_config;
- u32 ss_pol = 0, sclkpol = 0, sclkpha = 0, pre_div = 0, post_div = 0;
+ u32 ss_pol = 0, sclkpol = 0, sclkpha = 0, sclkctl = 0;
+ u32 pre_div = 0, post_div = 0;
struct cspi_regs *regs = (struct cspi_regs *)mxcs->base;
if (max_hz == 0) {
@@ -164,8 +165,10 @@ static s32 spi_cfg_mxc(struct mxc_spi_slave *mxcs, unsigned int cs,
if (mode & SPI_CS_HIGH)
ss_pol = 1;
- if (mode & SPI_CPOL)
+ if (mode & SPI_CPOL) {
sclkpol = 1;
+ sclkctl = 1;
+ }
if (mode & SPI_CPHA)
sclkpha = 1;
@@ -180,6 +183,8 @@ static s32 spi_cfg_mxc(struct mxc_spi_slave *mxcs, unsigned int cs,
(ss_pol << (cs + MXC_CSPICON_SSPOL));
reg_config = (reg_config & ~(1 << (cs + MXC_CSPICON_POL))) |
(sclkpol << (cs + MXC_CSPICON_POL));
+ reg_config = (reg_config & ~(1 << (cs + MXC_CSPICON_CTL))) |
+ (sclkctl << (cs + MXC_CSPICON_CTL));
reg_config = (reg_config & ~(1 << (cs + MXC_CSPICON_PHA))) |
(sclkpha << (cs + MXC_CSPICON_PHA));