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authorFelipe Balbi <balbi@ti.com>2014-06-23 17:18:24 -0500
committerMarek Vasut <marex@denx.de>2014-07-09 22:11:51 +0200
commit5ba95541b700d2edecb4d97d4b905f51ed8551b3 (patch)
tree26c9d9f31c03ce6815b63ef152d026a895907004
parent26707d9e6bb0d2e5e6de706cd68bddcea34e731f (diff)
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usb: phy: omap_usb_phy: implement usb_phy_power() for AM437x
Newer AM437x silicon requires us to explicitly power up the USB2 PHY. By implementing usb_phy_power() we can achieve that. Signed-off-by: Felipe Balbi <balbi@ti.com>
-rw-r--r--arch/arm/include/asm/arch-am33xx/hardware_am43xx.h5
-rw-r--r--drivers/usb/phy/omap_usb_phy.c17
2 files changed, 21 insertions, 1 deletions
diff --git a/arch/arm/include/asm/arch-am33xx/hardware_am43xx.h b/arch/arm/include/asm/arch-am33xx/hardware_am43xx.h
index b470319..efdecf4 100644
--- a/arch/arm/include/asm/arch-am33xx/hardware_am43xx.h
+++ b/arch/arm/include/asm/arch-am33xx/hardware_am43xx.h
@@ -43,6 +43,11 @@
#define VTP0_CTRL_ADDR 0x44E10E0C
#define VTP1_CTRL_ADDR 0x48140E10
+/* USB CTRL Base Address */
+#define USB1_CTRL 0x44e10628
+#define USB1_CTRL_CM_PWRDN BIT(0)
+#define USB1_CTRL_OTG_PWRDN BIT(1)
+
/* DDR Base address */
#define DDR_PHY_CMD_ADDR 0x44E12000
#define DDR_PHY_DATA_ADDR 0x44E120C8
diff --git a/drivers/usb/phy/omap_usb_phy.c b/drivers/usb/phy/omap_usb_phy.c
index af46db2..f78d532 100644
--- a/drivers/usb/phy/omap_usb_phy.c
+++ b/drivers/usb/phy/omap_usb_phy.c
@@ -222,7 +222,22 @@ static void am437x_enable_usb2_phy2(struct omap_xhci *omap)
void usb_phy_power(int on)
{
- return;
+ u32 val;
+
+ /* USB1_CTRL */
+ val = readl(USB1_CTRL);
+ if (on) {
+ /*
+ * these bits are re-used on AM437x to power up/down the USB
+ * CM and OTG PHYs, if we don't toggle them, USB will not be
+ * functional on newer silicon revisions
+ */
+ val &= ~(USB1_CTRL_CM_PWRDN | USB1_CTRL_OTG_PWRDN);
+ } else {
+ val |= USB1_CTRL_CM_PWRDN | USB1_CTRL_OTG_PWRDN;
+ }
+
+ writel(val, USB1_CTRL);
}
#endif /* CONFIG_AM437X_USB2PHY2_HOST */