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author | Jagannadha Sutradharudu Teki <jagannadha.sutradharudu-teki@xilinx.com> | 2014-01-09 01:48:06 +0530 |
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committer | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2014-01-10 15:18:32 +0100 |
commit | 53e49f746ce16c8f51063522542270a31c136e66 (patch) | |
tree | 2660169c5cea11b8bef3cc4ef3e7459c9a04e2f0 | |
parent | 7cd04192fc4e616b150240b396e1f5ae959cfe1c (diff) | |
download | u-boot-imx-53e49f746ce16c8f51063522542270a31c136e66.zip u-boot-imx-53e49f746ce16c8f51063522542270a31c136e66.tar.gz u-boot-imx-53e49f746ce16c8f51063522542270a31c136e66.tar.bz2 |
zynq: Minor config cleanup
Cleanups mostly on:
- Add comments
- Re-order configs
- Remove #define CONFIG_ZYNQ_SDHCI
Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
-rw-r--r-- | include/configs/zynq.h | 76 |
1 files changed, 39 insertions, 37 deletions
diff --git a/include/configs/zynq.h b/include/configs/zynq.h index 8be52df..c8ab06f 100644 --- a/include/configs/zynq.h +++ b/include/configs/zynq.h @@ -7,33 +7,51 @@ #ifndef __CONFIG_ZYNQ_H #define __CONFIG_ZYNQ_H -#define CONFIG_ARMV7 /* This is an ARM V7 CPU core */ +/* High Level configuration Options */ +#define CONFIG_ARMV7 #define CONFIG_ZYNQ /* CPU clock */ -#define CONFIG_CPU_FREQ_HZ 800000000 +#ifndef CONFIG_CPU_FREQ_HZ +# define CONFIG_CPU_FREQ_HZ 800000000 +#endif +/* Serial drivers */ +#define CONFIG_BAUDRATE 115200 /* The following table includes the supported baudrates */ #define CONFIG_SYS_BAUDRATE_TABLE \ {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400} -#define CONFIG_BAUDRATE 115200 - -/* XPSS Serial driver */ +/* Zynq Serial driver */ #define CONFIG_ZYNQ_SERIAL #define CONFIG_ZYNQ_SERIAL_BASEADDR0 0xE0001000 #define CONFIG_ZYNQ_SERIAL_BAUDRATE0 CONFIG_BAUDRATE #define CONFIG_ZYNQ_SERIAL_CLOCK0 50000000 +/* DCC driver */ +#if defined(CONFIG_ZYNQ_DCC) +# define CONFIG_ARM_DCC +# define CONFIG_CPU_V6 /* Required by CONFIG_ARM_DCC */ +#endif + /* Ethernet driver */ #define CONFIG_NET_MULTI #define CONFIG_ZYNQ_GEM #define CONFIG_ZYNQ_GEM0 #define CONFIG_ZYNQ_GEM_PHY_ADDR0 7 -#define CONFIG_ZYNQ_SDHCI -#define CONFIG_ZYNQ_SDHCI0 +#define CONFIG_ZYNQ_SPI +/* SPI */ +#ifdef CONFIG_ZYNQ_SPI +# define CONFIG_SPI_FLASH +# define CONFIG_SPI_FLASH_SST +# define CONFIG_CMD_SF +#endif + +/* NOR */ +#define CONFIG_SYS_NO_FLASH +#define CONFIG_ZYNQ_SDHCI0 /* MMC */ #if defined(CONFIG_ZYNQ_SDHCI0) || defined(CONFIG_ZYNQ_SDHCI1) # define CONFIG_MMC @@ -48,7 +66,6 @@ #endif #define CONFIG_ZYNQ_I2C0 - /* I2C */ #if defined(CONFIG_ZYNQ_I2C0) || defined(CONFIG_ZYNQ_I2C1) # define CONFIG_CMD_I2C @@ -58,26 +75,6 @@ # define CONFIG_SYS_I2C_ZYNQ_SLAVE 1 #endif -#if defined(CONFIG_ZYNQ_DCC) -# define CONFIG_ARM_DCC -# define CONFIG_CPU_V6 /* Required by CONFIG_ARM_DCC */ -#endif - -#define CONFIG_ZYNQ_SPI - -/* SPI */ -#ifdef CONFIG_ZYNQ_SPI -# define CONFIG_SPI_FLASH -# define CONFIG_SPI_FLASH_SST -# define CONFIG_CMD_SF -#endif - -/* Enable the PL to be downloaded */ -#define CONFIG_FPGA -#define CONFIG_FPGA_XILINX -#define CONFIG_FPGA_ZYNQPL -#define CONFIG_CMD_FPGA - #define CONFIG_BOOTP_SERVERIP #define CONFIG_BOOTP_BOOTPATH #define CONFIG_BOOTP_GATEWAY @@ -91,12 +88,9 @@ #define CONFIG_PHY_MARVELL /* Environment */ +#define CONFIG_ENV_SIZE 0x10000 /* Env. sector size */ #define CONFIG_ENV_IS_NOWHERE -#define CONFIG_ENV_SIZE 0x10000 - -#define CONFIG_SYS_NO_FLASH - -#define CONFIG_SYS_MALLOC_LEN 0x400000 +#define CONFIG_SYS_LOAD_ADDR 0 /* Miscellaneous configurable options */ #define CONFIG_SYS_PROMPT "zynq-uboot> " @@ -110,8 +104,6 @@ #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ sizeof(CONFIG_SYS_PROMPT) + 16) -#define CONFIG_SYS_LOAD_ADDR 0 - /* Physical Memory map */ #define CONFIG_SYS_TEXT_BASE 0 @@ -122,15 +114,25 @@ #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x1000) +#define CONFIG_SYS_MALLOC_LEN 0x400000 #define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_SDRAM_BASE #define CONFIG_SYS_INIT_RAM_SIZE CONFIG_SYS_MALLOC_LEN #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ CONFIG_SYS_INIT_RAM_SIZE - \ GENERATED_GBL_DATA_SIZE) -/* OF */ + +/* Enable the PL to be downloaded */ +#define CONFIG_FPGA +#define CONFIG_FPGA_XILINX +#define CONFIG_FPGA_ZYNQPL +#define CONFIG_CMD_FPGA + +/* Open Firmware flat tree */ +#define CONFIG_OF_LIBFDT + +/* FIT support */ #define CONFIG_FIT #define CONFIG_FIT_VERBOSE 1 /* enable fit_format_{error,warning}() */ -#define CONFIG_OF_LIBFDT /* Boot FreeBSD/vxWorks from an ELF image */ #if defined(CONFIG_ZYNQ_BOOT_FREEBSD) |