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authorTom Rini <trini@konsulko.com>2016-01-14 21:51:32 -0500
committerTom Rini <trini@konsulko.com>2016-01-14 21:51:32 -0500
commit4edde96111aefac63d6aaca6ba87a90d149e973e (patch)
tree83996996fc15554644c114e4f4d534d78cef15fd
parenta737028e80603f49a4757adec10b5842d0689dbb (diff)
parent5c2ed61ce235fd835a3f594bc983dfc20959568c (diff)
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Merge branch 'master' of git://git.denx.de/u-boot-x86
-rw-r--r--arch/x86/Kconfig9
-rw-r--r--arch/x86/cpu/baytrail/fsp_configs.c11
-rw-r--r--arch/x86/cpu/ivybridge/Kconfig1
-rw-r--r--arch/x86/cpu/mp_init.c84
-rw-r--r--arch/x86/cpu/qemu/Makefile2
-rw-r--r--arch/x86/cpu/qemu/cpu.c46
-rw-r--r--arch/x86/cpu/qemu/fw_cfg.c283
-rw-r--r--arch/x86/cpu/qemu/qemu.c3
-rw-r--r--arch/x86/cpu/queensbay/fsp_configs.c14
-rw-r--r--arch/x86/dts/microcode/m12306a2_00000008.dtsi554
-rw-r--r--arch/x86/dts/microcode/m12306a4_00000007.dtsi618
-rw-r--r--arch/x86/dts/microcode/m12306a5_00000007.dtsi618
-rw-r--r--arch/x86/dts/microcode/m12306a8_00000010.dtsi682
-rw-r--r--arch/x86/dts/qemu-x86_i440fx.dts9
-rw-r--r--arch/x86/dts/qemu-x86_q35.dts9
-rw-r--r--arch/x86/include/asm/arch-baytrail/fsp/fsp_configs.h19
-rw-r--r--arch/x86/include/asm/arch-ivybridge/pch.h10
-rw-r--r--arch/x86/include/asm/arch-queensbay/fsp/fsp_configs.h19
-rw-r--r--arch/x86/include/asm/fsp/fsp_api.h12
-rw-r--r--arch/x86/include/asm/fsp/fsp_platform.h15
-rw-r--r--arch/x86/include/asm/fsp/fsp_support.h20
-rw-r--r--arch/x86/include/asm/fw_cfg.h93
-rw-r--r--arch/x86/lib/fsp/cmd_fsp.c4
-rw-r--r--arch/x86/lib/fsp/fsp_support.c58
-rw-r--r--board/google/chromebook_link/Kconfig1
-rw-r--r--board/google/chromebox_panther/Kconfig1
-rw-r--r--doc/README.x8634
-rw-r--r--include/configs/x86-common.h3
-rw-r--r--include/fdtdec.h1
-rw-r--r--lib/fdtdec.c1
-rwxr-xr-xtools/microcode-tool.py14
31 files changed, 3143 insertions, 105 deletions
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index 7e7cb61..f07567c 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -242,6 +242,15 @@ config FSP_SYS_MALLOC_F_LEN
help
Additional size of malloc() pool before relocation.
+config FSP_USE_UPD
+ bool
+ depends on HAVE_FSP
+ default y
+ help
+ Most FSPs use UPD data region for some FSP customization. But there
+ are still some FSPs that might not even have UPD. For such FSPs,
+ override this to n in their platform Kconfig files.
+
config ENABLE_MRC_CACHE
bool "Enable MRC cache"
depends on !EFI && !SYS_COREBOOT
diff --git a/arch/x86/cpu/baytrail/fsp_configs.c b/arch/x86/cpu/baytrail/fsp_configs.c
index a72d615..d49b8d2 100644
--- a/arch/x86/cpu/baytrail/fsp_configs.c
+++ b/arch/x86/cpu/baytrail/fsp_configs.c
@@ -121,16 +121,23 @@ const struct pch_azalia_config azalia_config = {
};
/**
- * Override the FSP's UPD.
+ * Override the FSP's configuration data.
* If the device tree does not specify an integer setting, use the default
* provided in Intel's Baytrail_FSP_Gold4.tgz release FSP/BayleyBayFsp.bsf file.
*/
-void update_fsp_upd(struct upd_region *fsp_upd)
+void update_fsp_configs(struct fsp_config_data *config,
+ struct fspinit_rtbuf *rt_buf)
{
+ struct upd_region *fsp_upd = &config->fsp_upd;
struct memory_down_data *mem;
const void *blob = gd->fdt_blob;
int node;
+ /* Initialize runtime buffer for fsp_init() */
+ rt_buf->common.stack_top = config->common.stack_top - 32;
+ rt_buf->common.boot_mode = config->common.boot_mode;
+ rt_buf->common.upd_data = &config->fsp_upd;
+
fsp_upd->azalia_config_ptr = (uint32_t)&azalia_config;
node = fdtdec_next_compatible(blob, 0, COMPAT_INTEL_BAYTRAIL_FSP);
diff --git a/arch/x86/cpu/ivybridge/Kconfig b/arch/x86/cpu/ivybridge/Kconfig
index 56abd8f..1768a26 100644
--- a/arch/x86/cpu/ivybridge/Kconfig
+++ b/arch/x86/cpu/ivybridge/Kconfig
@@ -48,7 +48,6 @@ config DCACHE_RAM_MRC_VAR_SIZE
config CPU_SPECIFIC_OPTIONS
def_bool y
select SMM_TSEG
- select HAVE_INTEL_ME
select X86_RAMTEST
config SMM_TSEG_SIZE
diff --git a/arch/x86/cpu/mp_init.c b/arch/x86/cpu/mp_init.c
index 4334f5b..7917350 100644
--- a/arch/x86/cpu/mp_init.c
+++ b/arch/x86/cpu/mp_init.c
@@ -20,8 +20,11 @@
#include <asm/mtrr.h>
#include <asm/processor.h>
#include <asm/sipi.h>
+#include <asm/fw_cfg.h>
#include <dm/device-internal.h>
#include <dm/uclass-internal.h>
+#include <dm/lists.h>
+#include <dm/root.h>
#include <linux/linkage.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -104,7 +107,7 @@ static void ap_do_flight_plan(struct udevice *cpu)
}
}
-static int find_cpu_by_apid_id(int apic_id, struct udevice **devp)
+static int find_cpu_by_apic_id(int apic_id, struct udevice **devp)
{
struct udevice *dev;
@@ -137,7 +140,7 @@ static void ap_init(unsigned int cpu_index)
enable_lapic();
apic_id = lapicid();
- ret = find_cpu_by_apid_id(apic_id, &dev);
+ ret = find_cpu_by_apic_id(apic_id, &dev);
if (ret) {
debug("Unknown CPU apic_id %x\n", apic_id);
goto done;
@@ -210,7 +213,7 @@ static int save_bsp_msrs(char *start, int size)
return msr_count;
}
-static int load_sipi_vector(atomic_t **ap_countp)
+static int load_sipi_vector(atomic_t **ap_countp, int num_cpus)
{
struct sipi_params_16bit *params16;
struct sipi_params *params;
@@ -239,7 +242,7 @@ static int load_sipi_vector(atomic_t **ap_countp)
params->idt_ptr = (uint32_t)x86_get_idt();
params->stack_size = CONFIG_AP_STACK_SIZE;
- size = params->stack_size * CONFIG_MAX_CPUS;
+ size = params->stack_size * num_cpus;
stack = memalign(size, 4096);
if (!stack)
return -ENOMEM;
@@ -432,7 +435,7 @@ static int init_bsp(struct udevice **devp)
lapic_setup();
apic_id = lapicid();
- ret = find_cpu_by_apid_id(apic_id, devp);
+ ret = find_cpu_by_apic_id(apic_id, devp);
if (ret) {
printf("Cannot find boot CPU, APIC ID %d\n", apic_id);
return ret;
@@ -441,6 +444,69 @@ static int init_bsp(struct udevice **devp)
return 0;
}
+#ifdef CONFIG_QEMU
+static int qemu_cpu_fixup(void)
+{
+ int ret;
+ int cpu_num;
+ int cpu_online;
+ struct udevice *dev, *pdev;
+ struct cpu_platdata *plat;
+ char *cpu;
+
+ /* first we need to find '/cpus' */
+ for (device_find_first_child(dm_root(), &pdev);
+ pdev;
+ device_find_next_child(&pdev)) {
+ if (!strcmp(pdev->name, "cpus"))
+ break;
+ }
+ if (!pdev) {
+ printf("unable to find cpus device\n");
+ return -ENODEV;
+ }
+
+ /* calculate cpus that are already bound */
+ cpu_num = 0;
+ for (uclass_find_first_device(UCLASS_CPU, &dev);
+ dev;
+ uclass_find_next_device(&dev)) {
+ cpu_num++;
+ }
+
+ /* get actual cpu number */
+ cpu_online = qemu_fwcfg_online_cpus();
+ if (cpu_online < 0) {
+ printf("unable to get online cpu number: %d\n", cpu_online);
+ return cpu_online;
+ }
+
+ /* bind addtional cpus */
+ dev = NULL;
+ for (; cpu_num < cpu_online; cpu_num++) {
+ /*
+ * allocate device name here as device_bind_driver() does
+ * not copy device name, 8 bytes are enough for
+ * sizeof("cpu@") + 3 digits cpu number + '\0'
+ */
+ cpu = malloc(8);
+ if (!cpu) {
+ printf("unable to allocate device name\n");
+ return -ENOMEM;
+ }
+ sprintf(cpu, "cpu@%d", cpu_num);
+ ret = device_bind_driver(pdev, "cpu_qemu", cpu, &dev);
+ if (ret) {
+ printf("binding cpu@%d failed: %d\n", cpu_num, ret);
+ return ret;
+ }
+ plat = dev_get_parent_platdata(dev);
+ plat->cpu_id = cpu_num;
+ }
+ return 0;
+}
+#endif
+
int mp_init(struct mp_params *p)
{
int num_aps;
@@ -454,6 +520,12 @@ int mp_init(struct mp_params *p)
if (ret)
return ret;
+#ifdef CONFIG_QEMU
+ ret = qemu_cpu_fixup();
+ if (ret)
+ return ret;
+#endif
+
ret = init_bsp(&cpu);
if (ret) {
debug("Cannot init boot CPU: err=%d\n", ret);
@@ -483,7 +555,7 @@ int mp_init(struct mp_params *p)
mp_info.records = p->flight_plan;
/* Load the SIPI vector */
- ret = load_sipi_vector(&ap_count);
+ ret = load_sipi_vector(&ap_count, num_cpus);
if (ap_count == NULL)
return -1;
diff --git a/arch/x86/cpu/qemu/Makefile b/arch/x86/cpu/qemu/Makefile
index 3f3958a..176ea54 100644
--- a/arch/x86/cpu/qemu/Makefile
+++ b/arch/x86/cpu/qemu/Makefile
@@ -7,5 +7,5 @@
ifndef CONFIG_EFI_STUB
obj-y += car.o dram.o
endif
-obj-y += qemu.o
+obj-y += cpu.o fw_cfg.o qemu.o
obj-$(CONFIG_GENERATE_ACPI_TABLE) += acpi.o dsdt.o
diff --git a/arch/x86/cpu/qemu/cpu.c b/arch/x86/cpu/qemu/cpu.c
new file mode 100644
index 0000000..a1b70c6
--- /dev/null
+++ b/arch/x86/cpu/qemu/cpu.c
@@ -0,0 +1,46 @@
+/*
+ * Copyright (C) 2015, Miao Yan <yanmiaobest@gmail.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <cpu.h>
+#include <dm.h>
+#include <errno.h>
+#include <asm/cpu.h>
+#include <asm/fw_cfg.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int cpu_qemu_get_desc(struct udevice *dev, char *buf, int size)
+{
+ if (size < CPU_MAX_NAME_LEN)
+ return -ENOSPC;
+
+ cpu_get_name(buf);
+
+ return 0;
+}
+
+static int cpu_qemu_get_count(struct udevice *dev)
+{
+ return qemu_fwcfg_online_cpus();
+}
+
+static const struct cpu_ops cpu_qemu_ops = {
+ .get_desc = cpu_qemu_get_desc,
+ .get_count = cpu_qemu_get_count,
+};
+
+static const struct udevice_id cpu_qemu_ids[] = {
+ { .compatible = "cpu-qemu" },
+ { }
+};
+
+U_BOOT_DRIVER(cpu_qemu_drv) = {
+ .name = "cpu_qemu",
+ .id = UCLASS_CPU,
+ .of_match = cpu_qemu_ids,
+ .ops = &cpu_qemu_ops,
+};
diff --git a/arch/x86/cpu/qemu/fw_cfg.c b/arch/x86/cpu/qemu/fw_cfg.c
new file mode 100644
index 0000000..0599214
--- /dev/null
+++ b/arch/x86/cpu/qemu/fw_cfg.c
@@ -0,0 +1,283 @@
+/*
+ * (C) Copyright 2015 Miao Yan <yanmiaoebst@gmail.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <command.h>
+#include <errno.h>
+#include <malloc.h>
+#include <asm/io.h>
+#include <asm/fw_cfg.h>
+
+static bool fwcfg_present;
+static bool fwcfg_dma_present;
+
+/* Read configuration item using fw_cfg PIO interface */
+static void qemu_fwcfg_read_entry_pio(uint16_t entry,
+ uint32_t size, void *address)
+{
+ uint32_t i = 0;
+ uint8_t *data = address;
+
+ /*
+ * writting FW_CFG_INVALID will cause read operation to resume at
+ * last offset, otherwise read will start at offset 0
+ */
+ if (entry != FW_CFG_INVALID)
+ outw(entry, FW_CONTROL_PORT);
+ while (size--)
+ data[i++] = inb(FW_DATA_PORT);
+}
+
+/* Read configuration item using fw_cfg DMA interface */
+static void qemu_fwcfg_read_entry_dma(uint16_t entry,
+ uint32_t size, void *address)
+{
+ struct fw_cfg_dma_access dma;
+
+ dma.length = cpu_to_be32(size);
+ dma.address = cpu_to_be64((uintptr_t)address);
+ dma.control = cpu_to_be32(FW_CFG_DMA_READ);
+
+ /*
+ * writting FW_CFG_INVALID will cause read operation to resume at
+ * last offset, otherwise read will start at offset 0
+ */
+ if (entry != FW_CFG_INVALID)
+ dma.control |= cpu_to_be32(FW_CFG_DMA_SELECT | (entry << 16));
+
+ barrier();
+
+ debug("qemu_fwcfg_dma_read_entry: addr %p, length %u control 0x%x\n",
+ address, size, be32_to_cpu(dma.control));
+
+ outl(cpu_to_be32((uint32_t)&dma), FW_DMA_PORT_HIGH);
+
+ while (be32_to_cpu(dma.control) & ~FW_CFG_DMA_ERROR)
+ __asm__ __volatile__ ("pause");
+}
+
+static bool qemu_fwcfg_present(void)
+{
+ uint32_t qemu;
+
+ qemu_fwcfg_read_entry_pio(FW_CFG_SIGNATURE, 4, &qemu);
+ return be32_to_cpu(qemu) == QEMU_FW_CFG_SIGNATURE;
+}
+
+static bool qemu_fwcfg_dma_present(void)
+{
+ uint8_t dma_enabled;
+
+ qemu_fwcfg_read_entry_pio(FW_CFG_ID, 1, &dma_enabled);
+ if (dma_enabled & FW_CFG_DMA_ENABLED)
+ return true;
+
+ return false;
+}
+
+static void qemu_fwcfg_read_entry(uint16_t entry,
+ uint32_t length, void *address)
+{
+ if (fwcfg_dma_present)
+ qemu_fwcfg_read_entry_dma(entry, length, address);
+ else
+ qemu_fwcfg_read_entry_pio(entry, length, address);
+}
+
+int qemu_fwcfg_online_cpus(void)
+{
+ uint16_t nb_cpus;
+
+ if (!fwcfg_present)
+ return -ENODEV;
+
+ qemu_fwcfg_read_entry(FW_CFG_NB_CPUS, 2, &nb_cpus);
+
+ return le16_to_cpu(nb_cpus);
+}
+
+/*
+ * This function prepares kernel for zboot. It loads kernel data
+ * to 'load_addr', initrd to 'initrd_addr' and kernel command
+ * line using qemu fw_cfg interface.
+ */
+static int qemu_fwcfg_setup_kernel(void *load_addr, void *initrd_addr)
+{
+ char *data_addr;
+ uint32_t setup_size, kernel_size, cmdline_size, initrd_size;
+
+ qemu_fwcfg_read_entry(FW_CFG_SETUP_SIZE, 4, &setup_size);
+ qemu_fwcfg_read_entry(FW_CFG_KERNEL_SIZE, 4, &kernel_size);
+
+ if (setup_size == 0 || kernel_size == 0) {
+ printf("warning: no kernel available\n");
+ return -1;
+ }
+
+ data_addr = load_addr;
+ qemu_fwcfg_read_entry(FW_CFG_SETUP_DATA,
+ le32_to_cpu(setup_size), data_addr);
+ data_addr += le32_to_cpu(setup_size);
+
+ qemu_fwcfg_read_entry(FW_CFG_KERNEL_DATA,
+ le32_to_cpu(kernel_size), data_addr);
+ data_addr += le32_to_cpu(kernel_size);
+
+ data_addr = initrd_addr;
+ qemu_fwcfg_read_entry(FW_CFG_INITRD_SIZE, 4, &initrd_size);
+ if (initrd_size == 0) {
+ printf("warning: no initrd available\n");
+ } else {
+ qemu_fwcfg_read_entry(FW_CFG_INITRD_DATA,
+ le32_to_cpu(initrd_size), data_addr);
+ data_addr += le32_to_cpu(initrd_size);
+ }
+
+ qemu_fwcfg_read_entry(FW_CFG_CMDLINE_SIZE, 4, &cmdline_size);
+ if (cmdline_size) {
+ qemu_fwcfg_read_entry(FW_CFG_CMDLINE_DATA,
+ le32_to_cpu(cmdline_size), data_addr);
+ /*
+ * if kernel cmdline only contains '\0', (e.g. no -append
+ * when invoking qemu), do not update bootargs
+ */
+ if (*data_addr != '\0') {
+ if (setenv("bootargs", data_addr) < 0)
+ printf("warning: unable to change bootargs\n");
+ }
+ }
+
+ printf("loading kernel to address %p size %x", load_addr,
+ le32_to_cpu(kernel_size));
+ if (initrd_size)
+ printf(" initrd %p size %x\n",
+ initrd_addr,
+ le32_to_cpu(initrd_size));
+ else
+ printf("\n");
+
+ return 0;
+}
+
+static int qemu_fwcfg_list_firmware(void)
+{
+ int i;
+ uint32_t count;
+ struct fw_cfg_files *files;
+
+ qemu_fwcfg_read_entry(FW_CFG_FILE_DIR, 4, &count);
+ if (!count)
+ return 0;
+
+ count = be32_to_cpu(count);
+ files = malloc(count * sizeof(struct fw_cfg_file));
+ if (!files)
+ return -ENOMEM;
+
+ files->count = count;
+ qemu_fwcfg_read_entry(FW_CFG_INVALID,
+ count * sizeof(struct fw_cfg_file),
+ files->files);
+
+ for (i = 0; i < files->count; i++)
+ printf("%-56s\n", files->files[i].name);
+ free(files);
+ return 0;
+}
+
+void qemu_fwcfg_init(void)
+{
+ fwcfg_present = qemu_fwcfg_present();
+ if (fwcfg_present)
+ fwcfg_dma_present = qemu_fwcfg_dma_present();
+}
+
+static int qemu_fwcfg_do_list(cmd_tbl_t *cmdtp, int flag,
+ int argc, char * const argv[])
+{
+ if (qemu_fwcfg_list_firmware() < 0)
+ return CMD_RET_FAILURE;
+
+ return 0;
+}
+
+static int qemu_fwcfg_do_cpus(cmd_tbl_t *cmdtp, int flag,
+ int argc, char * const argv[])
+{
+ int ret = qemu_fwcfg_online_cpus();
+ if (ret < 0) {
+ printf("QEMU fw_cfg interface not found\n");
+ return CMD_RET_FAILURE;
+ }
+
+ printf("%d cpu(s) online\n", qemu_fwcfg_online_cpus());
+
+ return 0;
+}
+
+static int qemu_fwcfg_do_load(cmd_tbl_t *cmdtp, int flag,
+ int argc, char * const argv[])
+{
+ char *env;
+ void *load_addr;
+ void *initrd_addr;
+
+ env = getenv("loadaddr");
+ load_addr = env ?
+ (void *)simple_strtoul(env, NULL, 16) :
+ (void *)CONFIG_LOADADDR;
+
+ env = getenv("ramdiskaddr");
+ initrd_addr = env ?
+ (void *)simple_strtoul(env, NULL, 16) :
+ (void *)CONFIG_RAMDISK_ADDR;
+
+ if (argc == 2) {
+ load_addr = (void *)simple_strtoul(argv[0], NULL, 16);
+ initrd_addr = (void *)simple_strtoul(argv[1], NULL, 16);
+ } else if (argc == 1) {
+ load_addr = (void *)simple_strtoul(argv[0], NULL, 16);
+ }
+
+ return qemu_fwcfg_setup_kernel(load_addr, initrd_addr);
+}
+
+static cmd_tbl_t fwcfg_commands[] = {
+ U_BOOT_CMD_MKENT(list, 0, 1, qemu_fwcfg_do_list, "", ""),
+ U_BOOT_CMD_MKENT(cpus, 0, 1, qemu_fwcfg_do_cpus, "", ""),
+ U_BOOT_CMD_MKENT(load, 2, 1, qemu_fwcfg_do_load, "", ""),
+};
+
+static int do_qemu_fw(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+{
+ int ret;
+ cmd_tbl_t *fwcfg_cmd;
+
+ if (!fwcfg_present) {
+ printf("QEMU fw_cfg interface not found\n");
+ return CMD_RET_USAGE;
+ }
+
+ fwcfg_cmd = find_cmd_tbl(argv[1], fwcfg_commands,
+ ARRAY_SIZE(fwcfg_commands));
+ argc -= 2;
+ argv += 2;
+ if (!fwcfg_cmd || argc > fwcfg_cmd->maxargs)
+ return CMD_RET_USAGE;
+
+ ret = fwcfg_cmd->cmd(fwcfg_cmd, flag, argc, argv);
+
+ return cmd_process_error(fwcfg_cmd, ret);
+}
+
+U_BOOT_CMD(
+ qfw, 4, 1, do_qemu_fw,
+ "QEMU firmware interface",
+ "<command>\n"
+ " - list : print firmware(s) currently loaded\n"
+ " - cpus : print online cpu number\n"
+ " - load <kernel addr> <initrd addr> : load kernel and initrd (if any), and setup for zboot\n"
+)
diff --git a/arch/x86/cpu/qemu/qemu.c b/arch/x86/cpu/qemu/qemu.c
index 1f93f72..46111c9 100644
--- a/arch/x86/cpu/qemu/qemu.c
+++ b/arch/x86/cpu/qemu/qemu.c
@@ -11,6 +11,7 @@
#include <asm/processor.h>
#include <asm/arch/device.h>
#include <asm/arch/qemu.h>
+#include <asm/fw_cfg.h>
static bool i440fx;
@@ -57,6 +58,8 @@ static void qemu_chipset_init(void)
x86_pci_write_config32(PCI_BDF(0, 0, 0), PCIEX_BAR,
CONFIG_PCIE_ECAM_BASE | BAR_EN);
}
+
+ qemu_fwcfg_init();
}
int arch_cpu_init(void)
diff --git a/arch/x86/cpu/queensbay/fsp_configs.c b/arch/x86/cpu/queensbay/fsp_configs.c
index 78bc966..f83bb5f 100644
--- a/arch/x86/cpu/queensbay/fsp_configs.c
+++ b/arch/x86/cpu/queensbay/fsp_configs.c
@@ -8,13 +8,13 @@
#include <common.h>
#include <asm/fsp/fsp_support.h>
-void update_fsp_upd(struct upd_region *fsp_upd)
+void update_fsp_configs(struct fsp_config_data *config,
+ struct fspinit_rtbuf *rt_buf)
{
- /* Override any UPD setting if required */
-
- /* Uncomment the line below to enable DEBUG message */
- /* fsp_upd->serial_dbgport_type = 1; */
+ /* Initialize runtime buffer for fsp_init() */
+ rt_buf->common.stack_top = config->common.stack_top - 32;
+ rt_buf->common.boot_mode = config->common.boot_mode;
+ rt_buf->common.upd_data = &config->fsp_upd;
- /* Examples on how to initialize the pointers in UPD region */
- /* fsp_upd->pcd_example = (EXAMPLE_DATA *)&example; */
+ /* Override any UPD setting if required */
}
diff --git a/arch/x86/dts/microcode/m12306a2_00000008.dtsi b/arch/x86/dts/microcode/m12306a2_00000008.dtsi
new file mode 100644
index 0000000..6b35c39
--- /dev/null
+++ b/arch/x86/dts/microcode/m12306a2_00000008.dtsi
@@ -0,0 +1,554 @@
+/*
+ * Copyright (C) 2013, Intel Corporation
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright notice, this
+ * list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright notice, this
+ * list of conditions and the following disclaimer in the documentation and/or
+ * other materials provided with the distribution.
+ * * Neither the name of Intel Corporation nor the names of its contributors may
+ * be used to endorse or promote products derived from this software without
+ * specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
+ * THE POSSIBILITY OF SUCH DAMAGE.
+ * ---
+ * This is a device tree fragment. Use #include to add these properties to a
+ * node.
+ *
+ * Date:
+ */
+
+compatible = "intel,microcode";
+intel,header-version = <1>;
+intel,update-revision = <0x8>;
+intel,date-code = <0x5182011>;
+intel,processor-signature = <0x306a2>;
+intel,checksum = <0xa0e51feb>;
+intel,loader-revision = <1>;
+intel,processor-flags = <0x12>;
+
+/* The first 48-bytes are the public header which repeats the above data */
+data = <
+ 0x01000000 0x08000000 0x11201805 0xa2060300
+ 0xeb1fe5a0 0x01000000 0x12000000 0xd01f0000
+ 0x00200000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0xa1000000 0x01000200 0x08000000
+ 0x00000000 0x00000000 0x17051120 0xd1070000
+ 0x01000000 0xa2060300 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x5665ff94 0x179da7cf 0x1e819fb2 0xb0c24e8e
+ 0x5cb7beb5 0x43af9a6c 0xcb0b4ccc 0x195d8712
+ 0xdb01345a 0xceecca42 0x5ee7d8b4 0x24afdbe6
+ 0x5fb36178 0xbc17d76b 0x31b7b923 0xc81aec82
+ 0x647b3320 0xf1db9653 0xff3b9759 0xe9c74b72
+ 0x3b193752 0xc147860b 0x160e0d6a 0x5bdb9dbf
+ 0x1ccce2ac 0x387670ad 0x2f106f05 0xf8607ea3
+ 0x42562576 0x30e086fb 0x409a06b8 0xf1957736
+ 0x5eb03f65 0xad147fab 0xe1a8e8b6 0x208d59d2
+ 0x683fba2e 0xf172b378 0xf8138dba 0x61e81d1f
+ 0xd551f997 0x28c79780 0x04f9db27 0xa80679b9
+ 0xaca4e7ff 0x6876944b 0x26d7dbc1 0x77f7dc2a
+ 0xf0bcb163 0x1b2a8e81 0x7b90aa49 0x8d5eaf2f
+ 0x522384ae 0xae7f7082 0x412ba10a 0x1ce1baa0
+ 0x478c29b4 0x9c09b4d2 0xf225f64f 0xd43026cd
+ 0x81098579 0x7df5db05 0xa5815bb0 0xc73ee756
+ 0x9738cb95 0xa5bd62e2 0x88e2c6b2 0x778e7fcb
+ 0xd3bdb872 0x9404403f 0x5be6ad63 0x71dc4abc
+ 0x11000000 0x72873db0 0x0f41a6d6 0x609f17c3
+ 0x1b1349d0 0xe1950c52 0xdbc8e4fc 0xebc212b5
+ 0x77697371 0x7b156982 0xe71e5ccf 0x78bd638c
+ 0x1b196322 0x8b7ebfbf 0xc2e2588f 0xf139b826
+ 0x98ac3169 0xaa9131b0 0x2d7563f8 0xa1300b39
+ 0x5bd4675f 0x25a4b079 0xe006afb1 0x2bd60828
+ 0x453a0abb 0x3b944679 0x33fd63fd 0xd26ff3c9
+ 0x23c0a581 0xf3beb03a 0xc07109cb 0x2e4c27d9
+ 0xc857a22e 0x470c5b1d 0x5b990a43 0x9f6999e6
+ 0xb5d88f30 0x48c6a95c 0x3756bdc5 0xdc7011d2
+ 0x705d8ef2 0xa657f56c 0xa0b168a4 0x219a3d73
+ 0xb761630a 0x3fa1fb9a 0xe82b74c6 0x037911be
+ 0x5104f10d 0xb4b9e04c 0x4db05893 0x86feb635
+ 0x7391fed4 0x5a690081 0x05797a02 0xce30465e
+ 0x989cdec2 0xa478a8c8 0xa406b02b 0x4ac6e170
+ 0x54ceef3f 0xbbe5e10f 0x7e60e8e1 0x32a015cf
+ 0xaf6491a8 0xef6c1c39 0x38d54b81 0xbca9aa3f
+ 0x7be47871 0x1af28407 0x07fde04d 0x56d82648
+ 0x9f91a24f 0xa71eb768 0x263f176d 0x324196dd
+ 0xa31a37a9 0x3f14178c 0xb3fbb89e 0x18d29b03
+ 0x95c2e349 0xbf559bbe 0xa011c68a 0x0be59ecf
+ 0x644217f4 0x330a8356 0x89f5956e 0xb7103120
+ 0x7d0d2203 0x9d40fc96 0xa9279679 0x81d22306
+ 0x1bc7b5fa 0x679e3a28 0x511a7129 0x81a006a4
+ 0x9791dd09 0xed9dd69a 0xe28904ab 0x90621a2e
+ 0x22efe24d 0x215fd043 0x833f7214 0xf4603491
+ 0x38147d32 0xb4a8fadf 0x306947c3 0xf0998693
+ 0x42fc3ed8 0xe04820c4 0x377e0027 0xd9ed3c92
+ 0xcd166b69 0x1d43b6b7 0x16efc18a 0x5890992a
+ 0xae281f65 0x94b09325 0x6129dee5 0x60ccec89
+ 0xae1b35bb 0xdbe389b3 0xd140a7cf 0xccfe2e86
+ 0x72eff1e3 0x625e92d5 0x7e85420e 0x857f43db
+ 0x22c8784b 0x614e4fff 0x02e87cf8 0x2cb6de43
+ 0xd0bc235d 0xcd19968c 0xcce91f04 0xf36b1f2b
+ 0x8552a638 0x8c3b66fa 0x6fce17b0 0xa1a44384
+ 0x141c8798 0xa8981b4d 0x5d62efa2 0x2b9c0cdd
+ 0x985db4b2 0xbdcb9557 0xd46a70e4 0x90353762
+ 0xdb088ed9 0xcb410eb4 0x7d6bb4b1 0x9b451d22
+ 0xd96dca73 0xec56e8fc 0xa450a765 0x327ca511
+ 0x8d498359 0x1c9ec3a8 0x1986a9a5 0x42c679d5
+ 0xbfbe6164 0xde72b0ba 0xec2c6e93 0x97079604
+ 0x11657c6b 0xf82e6bbe 0x98cddc0b 0xb3168682
+ 0xc22896e3 0x33885964 0xc4791283 0x50553998
+ 0x21976704 0x167c459a 0xb083168c 0x77f08c0f
+ 0x31bbef07 0xff142fda 0xca69c3aa 0x56b2c97c
+ 0x4ba16716 0x7c0688a8 0x8a975497 0x5b7d39f6
+ 0x92815873 0x83bba85a 0x561a8fe1 0xd8b1a419
+ 0x092b76af 0xa708fdcc 0x49986eb3 0xd6ff3b26
+ 0x7bc162a2 0xe1d164fb 0x008705e0 0x825bf6b2
+ 0x5f14e5be 0x69a27ff8 0xd8803cea 0x813c89d2
+ 0xd0558aee 0x88dfdd34 0xb959a0e2 0x948e4309
+ 0xd11e40fa 0x12e739ee 0x453a6b84 0xb85174b9
+ 0x433b0d8c 0x44a8a145 0xe904b21b 0x6a824691
+ 0xf9a191ff 0xe930a249 0x54cc511b 0x76860260
+ 0x268756d3 0x6c535556 0xa89514ea 0x553d3792
+ 0xcb004a7b 0xa2f0234b 0x044d0f13 0x92fa800e
+ 0x5c3ff9d0 0x58dbc14d 0xe305c4da 0xa8af0443
+ 0x88efda5c 0xdeba05ec 0xb128acf7 0x8246648d
+ 0x1ff6d432 0xe919faec 0xd7593779 0xbf4f4ffa
+ 0x26ff3f67 0xe385e75c 0xece43afa 0xd18361ac
+ 0x6f1ff0fd 0x34930c03 0x21c3bb52 0x18508c5a
+ 0x5fac5947 0x93bf46c5 0x0093135f 0x976eee2b
+ 0x0d151deb 0x4b80987a 0x172ce7ac 0x3858dca0
+ 0xf97070db 0x2ac62f48 0xb4a51e8a 0x419c1d35
+ 0xdd9e5157 0xdb21aaea 0xb81f9985 0x19ad9859
+ 0x2074a3fb 0x6f15f27d 0xef3f652b 0x9896582e
+ 0x6787efe9 0xcd8c63a6 0xb94fa052 0xe20b59c5
+ 0x1ae5c0b4 0x46c3b1cc 0xe47ae0a2 0x979ceb01
+ 0x8281c594 0x87d430bc 0x8e6942f1 0x73f40077
+ 0x201415c5 0x46f3e2ea 0x2804b307 0xfa897dc7
+ 0xb79c8456 0x9a7f1b68 0x21f77388 0x0a40a857
+ 0xfa9f096e 0x097fec4b 0xb59a8326 0x25825192
+ 0x68c6b0a0 0xd2757f43 0xd09b408f 0x725ee748
+ 0x4391e4eb 0x8147e982 0x2f153b18 0x6251b500
+ 0x69963d11 0xdd3d67f7 0x67efacc9 0xface6418
+ 0xf4d9b154 0x3e6a6c27 0x95ab29e6 0x75d11283
+ 0xe5377709 0x08831cbb 0x9151f9ee 0x23e3dd5e
+ 0x8b7c87d1 0x71e2550f 0x85943522 0x4486916b
+ 0x8c253c1f 0x197c271c 0xda897e03 0x0ba0b957
+ 0xfefb65f3 0x53e500f3 0xcc52630b 0x008ec579
+ 0x225da363 0xfb129d9f 0x7069493e 0x4657e2d2
+ 0xc1d73c79 0xd292191b 0x26314c0f 0x8a20f248
+ 0x76a162b3 0x5b55dd77 0xa03e9e9b 0xca6b073d
+ 0x813cbaa7 0x7078a94e 0x7d14ed49 0xd86e4ddc
+ 0xe2038ab7 0x75e3ca49 0xd65dfae1 0x340125b8
+ 0x815bb509 0xe7270f14 0xd9f5770c 0x9aca22c5
+ 0x0c48deca 0x3c2ff24f 0x2afdbc05 0x1dafce0a
+ 0x3cbe90b4 0xb37b8faf 0xb83cc372 0xe0468ba6
+ 0x32dca511 0x3c026766 0xceb30b38 0x4cfe6196
+ 0x98bbba31 0xe6322e2c 0x7bcd465a 0x9825fc05
+ 0xe9a469ad 0x94e517ec 0x49318a22 0xbee03c9e
+ 0x85e37df3 0x44358a91 0x00c0490a 0xad1e4041
+ 0xef509388 0xf3194050 0xda5a0de5 0x849d1b1a
+ 0xad5c5ce7 0x624cadd7 0xef00b2c8 0x5c423950
+ 0x8ecbf150 0x98314268 0xe7188ca4 0x4c7ab52e
+ 0xe8bd4c4f 0xdd2360e4 0xf72623e8 0xed45c186
+ 0xf1271f39 0xf128076c 0x499fe644 0xc243460d
+ 0xb399912a 0x1894c1fc 0xcc5a12f5 0xb554e06c
+ 0xf7cf59fd 0xd09ce7ed 0x8f93995d 0xad38e480
+ 0x92cfa3cb 0xef29ce8c 0x1ca8efb2 0x4c390618
+ 0x33e36271 0x752074a0 0xda478d2d 0x10a52d8c
+ 0xd99a36a7 0x50d0db0d 0x728e2f68 0x2eaec798
+ 0x6f5ee097 0x965b0f08 0x0e15ab52 0xadcd83da
+ 0xc2a386bb 0x9ba0071f 0xac242740 0x362668f6
+ 0x01e0adea 0x6d1b2254 0xdbd0fa8d 0x2ef68fe9
+ 0x19742cda 0xa2522cd1 0xad6009c1 0x56374b42
+ 0xf77e7b87 0xf47d5152 0x34ef274c 0x6c8f69db
+ 0xe7c1cd2a 0x60ad1a6c 0x5f11b920 0xe4e903e2
+ 0x6d6d9227 0xcd1f2eb2 0x5c81902d 0x637840a0
+ 0x47f88b3c 0xfcc51034 0xad97af5c 0x14403d02
+ 0x9aae22d0 0x42c50b60 0xdf483d6e 0x5b123f8f
+ 0xb8567830 0x4552282d 0x67ecb54f 0xc5279a68
+ 0x47ca430f 0xf3b581cf 0x70084982 0x04e7a816
+ 0x339e2452 0x0ef1fb04 0x15e018cc 0xd2f83552
+ 0x25be4294 0x643a42a0 0x6ea8207e 0xfd01053a
+ 0xfb25050b 0x8f9d5a9b 0x97e55134 0xb338c705
+ 0xcd1fed07 0x21e5fea1 0xbefd892a 0xe870d3b7
+ 0x696555e9 0x02e80efb 0x91be36e5 0xe98e722a
+ 0x0984101b 0x5b7e344c 0x2c37b88d 0xd153be06
+ 0x58a02ee9 0xb74cde84 0xf2c74516 0x86e3e608
+ 0xf476e86e 0x08053489 0xd8eaa295 0x1042e1aa
+ 0xdc1f613a 0x87af7b7b 0x4bc87db1 0xa005aa8f
+ 0xf85e8566 0xeefb7891 0x6a71cdde 0xc897237c
+ 0xd08778ac 0xdb46f47e 0x87900844 0x19bf15ab
+ 0x0fac1b10 0xbca22485 0xf09a3374 0x222594b1
+ 0xbeac6e17 0x9751d50a 0xe57b78de 0x00c901d4
+ 0x6f8569b0 0x7d778d8e 0x146b7a5e 0x017752fe
+ 0xd2efab56 0x92b6414b 0x796c0dac 0xf2c9ba15
+ 0xffaaf707 0x9e1e0c82 0x22410900 0x703caaf1
+ 0x3ba1fbb8 0x6e330a79 0xe8e3416d 0x19f96d99
+ 0xaad45f95 0x8c23afce 0x79ee1c03 0xf9926e38
+ 0x4552598e 0x2a1ab185 0x9614a74f 0x3ee75de8
+ 0xcfd5e9bf 0xfa7c8c10 0xec727ddd 0x596c2a3a
+ 0x2602a577 0xc8701cc0 0x90670ca5 0x6fd2074a
+ 0x237729e5 0xf94389fe 0x56294aca 0xf0e25fcb
+ 0x92d8755e 0xc9ebab69 0x0056c4bf 0x0802b4bd
+ 0xdca506fb 0x8af71ac1 0x5664ee70 0xc0cc9b12
+ 0x1f2b957c 0x86d75b65 0x0356f061 0xb2a7df2d
+ 0xeebcaed9 0x82240f86 0xd442e66e 0x1c90f7a0
+ 0x340ffd46 0x6665830d 0x92d79070 0x5b84b23b
+ 0x73652140 0x9cc4ba89 0x7a5e361b 0x889de8a4
+ 0xf767445b 0x9c6e7316 0x35e07fc4 0x762678c9
+ 0x8a3e23a1 0x8cf392c6 0xbb9bba49 0xb212b538
+ 0x786d11be 0xc04b989b 0xd286c664 0x9e666e96
+ 0x28987d62 0x5620e31f 0x09284b40 0x2c655487
+ 0xce2d6072 0x1f253329 0xffdc93fe 0x7945e700
+ 0x3e063409 0x6b24a76c 0xdc165d13 0x3f1924ad
+ 0x9a20aec4 0xabbd3741 0xa9242541 0x9c2e780b
+ 0xc8369a55 0x285bee8f 0x34564d35 0x36e55913
+ 0x3e64991f 0x17d9e58c 0x8dd1fb64 0x4d8358d3
+ 0x87a80361 0xa4d61dc4 0xf6dfa482 0x81d24c35
+ 0xaf27cba3 0x5e332395 0xfad6e5a3 0x9cabf33a
+ 0xdcf0921d 0xd893c3a9 0xee8cd5a4 0x4803a801
+ 0x4083023b 0x23272921 0xbe63102a 0x6b62f4fc
+ 0xd1358925 0x4c87470c 0xed7e0c37 0x789f86b5
+ 0x48312d14 0xb50547c3 0x310318b3 0xad0e876b
+ 0x3a2b377d 0xed05829b 0x652ded97 0x316081ba
+ 0xd2d2e21c 0xfc3ca2b5 0x1d480f5b 0x854ae0b9
+ 0x1cb9edae 0x1e8f5f6c 0x0b1cac90 0xd02474f8
+ 0xb6cb0359 0x991a241f 0x961dfdd4 0xf4f8a95b
+ 0xa67e5206 0xbe5efa25 0xdc619c64 0xf350e2b2
+ 0x8244d7a0 0x95ff2840 0x1c8b0751 0x001daf7b
+ 0xb4690af6 0x8ada4365 0xebae8afb 0xa9899cc7
+ 0x651b4e76 0xd42501d5 0xbb5a2d30 0x6b0b4fe7
+ 0xb66d5241 0xe4793b34 0x18e98006 0x2f6217e4
+ 0x9dd33721 0xfdd14fb3 0x03e82ad0 0xd5e2dfaa
+ 0xa248461b 0xa309bef3 0x47472de0 0x0ce6c4c7
+ 0xd9c0bf01 0x5c54a2ca 0x9e55fa97 0x992a4b89
+ 0xc75b9782 0xb02d7a3d 0xd948fab4 0x1b6501d6
+ 0x2674a8ad 0xb1ca0d48 0xcfb534c8 0x729864bb
+ 0x047b2178 0xd88ea657 0x863cf450 0xf0fb6923
+ 0x8399574f 0x2bc03d5c 0xb0f7d334 0xfddf7c72
+ 0x462f1132 0x0640ff38 0x03b426be 0x6af7f1f8
+ 0x474d955c 0xd8174573 0x9975e719 0x4956644c
+ 0x38702613 0xa5ca4cdd 0xc55e5234 0xcd7f3532
+ 0x5696e34e 0xbe5a5c3a 0x1faa53bc 0xba0b5b0a
+ 0xc02b0e33 0xa13f7ec5 0x424cbc5c 0x5aa097cf
+ 0x8e8d1c22 0xab66e427 0x9c1053f7 0x7e62751d
+ 0xd4b094a1 0x57d4766f 0xd023b33a 0xbe020296
+ 0x8102755f 0x6bda667c 0x98f6ea76 0x6deaffb3
+ 0x151caa3c 0x0a1040da 0xf125ebd5 0x929de719
+ 0x6618f307 0x30725caa 0x43a034bf 0x3c576c26
+ 0x77fcf426 0xc360ce49 0x11bc4948 0x2e6dcbf3
+ 0x8b97bf44 0x6eb13c10 0x00cd36ab 0x96b6882c
+ 0x0b312e25 0x534ce45f 0xa6989601 0x6c6c7cdf
+ 0x55fcf9b5 0xea942bc0 0x8252c5ce 0xfd09785c
+ 0x229c3b7d 0xe7129a97 0x9f8db8fb 0xcf692362
+ 0xec8bd49b 0x5b8af7c5 0x020d4843 0xb93cf2c8
+ 0xedcd4fa7 0xf2a9574a 0xa90f2c74 0x5e07cf79
+ 0x0eec3c4c 0x7072b5f5 0x510792d6 0x903a8ca6
+ 0x0952d985 0xa48b5979 0xc6f1cfc7 0xbac813be
+ 0x736163ef 0x6c8e44e9 0x06d2bd0a 0x3fc587d5
+ 0x286e1d65 0x5b6555f6 0x275f8dcc 0x5edb3403
+ 0x412474ed 0x4e41ec00 0xb715c278 0x2777a192
+ 0x40ded494 0x319ec8a6 0xb39c0eef 0xfe4dafca
+ 0xa708b162 0x11d2111f 0xc2806d8e 0x2b631990
+ 0xfc59bb27 0x440667ec 0xc1c43799 0x4aa51bc7
+ 0x08ce990d 0x2425580c 0x9645de2a 0xe7196d6c
+ 0x08d4d524 0xcf4e772a 0x21c18347 0x5bd72d56
+ 0x883bf90b 0xbc262ff0 0x10cfdc55 0x18022197
+ 0x5f0ab36f 0xd689e2b8 0x1c69f462 0x48bba7d6
+ 0x0ab172cd 0xdf060504 0xf8973c1b 0x3206adfe
+ 0xb2cb1735 0xcd9a2237 0xa5fb46de 0x9ffccb44
+ 0xf10d190e 0x587966c0 0xc51151f6 0xadf04413
+ 0x3d06c31b 0x04ee4955 0xc8e0c658 0xc18cf4b3
+ 0xb8819010 0xca4f5220 0xe344f060 0x570b4cda
+ 0x012d0bbc 0xddd75842 0xa6785823 0x03817bbe
+ 0x0a36b9c3 0xa63ce601 0xb400ed89 0x54269ffd
+ 0x932e8525 0xe2e69e40 0xe58b54cc 0x719413e6
+ 0x7d4f6793 0x646d4539 0x697134ac 0x5e748699
+ 0x9c139a59 0x70481219 0x5dde0274 0x6360523a
+ 0xdbb51cc7 0xba4b4e11 0x963acf63 0x023187de
+ 0x7cafba20 0x720a2328 0xdfde4451 0x3f316592
+ 0x90a1cd0b 0x1efcf177 0x2670f653 0x5dc15d80
+ 0xf3f6b6ae 0x0a99dbc7 0x42fa199c 0xd007fb9a
+ 0x20fddba0 0x6a405776 0x729727cc 0xd241beb5
+ 0x68157d9b 0xe4757002 0x17213665 0x75a6352a
+ 0xf501fc00 0x1b3c2485 0x26b32b05 0x134c5648
+ 0x02a9493d 0xd09b71a2 0x37c03496 0x93cc61cc
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+ 0xe2140131 0x06b3aaed 0x945a8a4d 0xbdc051cc
+ 0x12a396f8 0x86c84c40 0x2398465d 0x90831319
+ 0x4d8b474e 0x31edf74a 0x68605ffb 0xdbd5aab4
+ 0x03a20ef4 0xcb578309 0x55cf8de4 0xeb63cc3e
+ 0x77b6e657 0x9064c204 0x7e508ca7 0x51f9cc07
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+ 0x61059c50 0x6644040c 0xbb47186a 0x0b39b8a5
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+ 0xe124dcf9 0x0ce35a7e 0x4e5de898 0xe898bb85
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+ 0x50e5417c 0xadfe8513 0xd00a97c3 0x7942e79c
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+ 0xf7baebc4 0x65071bbc 0xb73a6304 0x2a18402c
+ 0x04e85d51 0x0eb01c76 0x6f73e255 0xd392e3ab
+ 0x31ab0616 0x9ab8ba65 0xab2a2eb9 0x34934a78
+ 0xf8561348 0x2f6642b1 0x30261a32 0xb2a6c09a
+ 0x4a420e88 0x33557453 0x19bda003 0xaf4e76ba
+ 0xed9dc685 0x604c61a9 0x9725b972 0x329201c2
+ 0xa9b4b087 0x5e06c74d 0x9628fdb1 0xe6dc0d04
+ 0xb18577fa 0xa989c3cc 0x5b299fb7 0x36aaa3cb
+ 0x6b39a761 0x25bdf05f 0x7b7c71ba 0x8265ae16
+ 0x403fe456 0x96ec45f1 0x087b5470 0x217e734d
+ 0xe65c9541 0x688d43f3 0x5bcec90f 0x80e971c0
+ 0x62f76d35 0x5f9030d0 0xacefa05f 0x64ac9810
+ 0xd6667793 0x35f8565f 0xf7247bcb 0xc34e0feb
+ 0xcae60e22 0x728fffe8 0xcf6a16ce 0x8d4fac73
+ 0x8ad230fc 0x987257c0 0x8c7a1da5 0xa7dbda8d
+ 0x3c09c385 0x647f2867 0xf0b3b5dc 0x781eb0e9
+ 0x6244d05d 0x337bd6a2 0x77dd9e28 0xc48c5512
+ 0x883e4cfe 0x66ad74fd 0x1f659c37 0xd65bfb11
+ 0xb2389cda 0xdfdd6141 0x28888c3d 0x2e76ac3f
+ 0x7b21a7f9 0x5ceb1f5b 0x97f62545 0xaefe190f
+ 0x16fd077d 0xd558d127 0x1fe8a8a7 0xaab0dc71
+ 0x8ea4576c 0x17a8b8ef 0x7476364f 0x229b0ca9
+ 0x236b1e56 0x5c1bd152 0x20002652 0x8c0805cd
+ 0x4c122c4d 0x6cbd72db 0xa9d9d258 0x4817fa88
+ 0xc805adb3 0x227416db 0xd58adbb5 0x11cdd037
+ 0xc06e6c92 0x1c548525 0x8cbfab9f 0xa4b1c180
+ 0xffab2b24 0x186068bb 0x8983f63b 0x982997b0
+ 0x5abc10e6 0xdfd139c5 0x11c9b6e9 0x86cdfc81
+ 0x4f8010c7 0x1e1646b6 0x9d66a0d2 0x37c4239d
+ 0x8066847b 0xaadad61e 0x3eaf7caf 0x957e015c
+ 0x4d78bfc3 0x15c3fe27 0x6c2d2fc5 0x84af2a8b
+ 0x59a66a0b 0x3e13f346 0xe9874a62 0xa7446843
+ 0xdecfe92c 0x120cf098 0x1d188cb6 0xa4938e5f
+ 0x9023d7e1 0x8bbdb7db 0xaf452ce8 0x6854d9e8
+ 0x0604f218 0xd39c3237 0x3754ebaf 0x4ae59d90
+ 0x3913e367 0x99b1902a 0x78c06ff6 0xc177a4a5
+ 0x218159ad 0x01ec7cd6 0x5a6bda31 0x9a753f92
+ 0xecad36d9 0xa2216cdb 0x4fc8328e 0x879ac7be
+ 0x23f3f907 0x5b59fad8 0x122a1644 0x16e63209
+ 0xcfc827a1 0xfe332476 0x2b72bb15 0xd478caf1
+ 0x21deb5e0 0x3c1a561e 0xb59be4e8 0x4598f63e
+ 0x20194b01 0xb4d76ed5 0xb58e06d8 0xb1219a36
+ 0xdefe3946 0x0731248f 0xcfa09f93 0xe420d6e6
+ 0x8a0518ba 0x013d8f80 0xd32a05ed 0x7d9d8209
+ 0x548cb1d4 0x69457a2c 0x668a0a70 0x8cc2b661
+ 0xb72d4ad3 0x19b388c7 0xb844dd6f 0x4dc39493
+ 0x7e96565c 0x53959236 0x1dd4a349 0xe50914a5
+ 0x319844c0 0xddbb2abd 0x2f126ba4 0xa46c6d63
+ 0xd6829c4d 0x8f178677 0x8ae6291d 0xb5660702
+ >;
diff --git a/arch/x86/dts/microcode/m12306a4_00000007.dtsi b/arch/x86/dts/microcode/m12306a4_00000007.dtsi
new file mode 100644
index 0000000..c39fbd3
--- /dev/null
+++ b/arch/x86/dts/microcode/m12306a4_00000007.dtsi
@@ -0,0 +1,618 @@
+/*
+ * Copyright (C) 2013, Intel Corporation
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright notice, this
+ * list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright notice, this
+ * list of conditions and the following disclaimer in the documentation and/or
+ * other materials provided with the distribution.
+ * * Neither the name of Intel Corporation nor the names of its contributors may
+ * be used to endorse or promote products derived from this software without
+ * specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
+ * THE POSSIBILITY OF SUCH DAMAGE.
+ * ---
+ * This is a device tree fragment. Use #include to add these properties to a
+ * node.
+ *
+ * Date:
+ */
+
+compatible = "intel,microcode";
+intel,header-version = <1>;
+intel,update-revision = <0x7>;
+intel,date-code = <0x9082011>;
+intel,processor-signature = <0x306a4>;
+intel,checksum = <0x7e23e5af>;
+intel,loader-revision = <1>;
+intel,processor-flags = <0x12>;
+
+/* The first 48-bytes are the public header which repeats the above data */
+data = <
+ 0x01000000 0x07000000 0x11200809 0xa4060300
+ 0xafe5237e 0x01000000 0x12000000 0xd0230000
+ 0x00240000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0xa1000000 0x01000200 0x07000000
+ 0x00000000 0x00000000 0x07091120 0xd1080000
+ 0x01000000 0xa4060300 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x9539a0b3 0xc7bb991d 0x308f0f1a 0xb1ba077d
+ 0x8bd7260b 0xd710ad0c 0xf82ee64b 0xe6f11ce1
+ 0xdb01345a 0xceecca42 0x5ee7d8b4 0x24afdbe6
+ 0x5fb36178 0xbc17d76b 0x31b7b923 0xc81aec82
+ 0x647b3320 0xf1db9653 0xff3b9759 0xe9c74b72
+ 0x3b193752 0xc147860b 0x160e0d6a 0x5bdb9dbf
+ 0x1ccce2ac 0x387670ad 0x2f106f05 0xf8607ea3
+ 0x42562576 0x30e086fb 0x409a06b8 0xf1957736
+ 0x5eb03f65 0xad147fab 0xe1a8e8b6 0x208d59d2
+ 0x683fba2e 0xf172b378 0xf8138dba 0x61e81d1f
+ 0xd551f997 0x28c79780 0x04f9db27 0xa80679b9
+ 0xaca4e7ff 0x6876944b 0x26d7dbc1 0x77f7dc2a
+ 0xf0bcb163 0x1b2a8e81 0x7b90aa49 0x8d5eaf2f
+ 0x522384ae 0xae7f7082 0x412ba10a 0x1ce1baa0
+ 0x478c29b4 0x9c09b4d2 0xf225f64f 0xd43026cd
+ 0x81098579 0x7df5db05 0xa5815bb0 0xc73ee756
+ 0x9738cb95 0xa5bd62e2 0x88e2c6b2 0x778e7fcb
+ 0xd3bdb872 0x9404403f 0x5be6ad63 0x71dc4abc
+ 0x11000000 0x71f0ab19 0x85635e57 0xfecdeb36
+ 0x7c93f457 0x13e3fb92 0xa512551d 0x6ac10509
+ 0x423fe38d 0x778481b6 0xff413c23 0x534d1d6c
+ 0xade61b9c 0x8cc43e62 0x0a8e5091 0x47382579
+ 0x8ee1d885 0x370915dc 0x8d8274f9 0xff11ba81
+ 0xb0919d7d 0xac434821 0x46d13494 0xe7fcc12e
+ 0x37876ec1 0x67a67b02 0x8d80b952 0xa2bdb26e
+ 0xf19c0c77 0x7b1f5296 0x544fbc2f 0xa8a3b1de
+ 0x8285fcfb 0xcab6dcc3 0x2a63f8de 0xab28edcf
+ 0x86e0e1cf 0xc21e5137 0x04616818 0x3172cc2e
+ 0x4a472e10 0xea8d7f3d 0x7e225494 0x7df2be43
+ 0x8a86b11c 0xf6894a26 0x81b6df9a 0x967c4076
+ 0x8c3e7b47 0xf81709e7 0x8bc622d9 0x4ed8aeae
+ 0x7cc696b5 0x45fb131d 0x77f322fb 0x4801173e
+ 0x056db13d 0x9a64fc3a 0x1508afa7 0xbb357cd3
+ 0xb863aa72 0xe57b932d 0x30892535 0x56a5e167
+ 0x842d402f 0x3113bd4c 0x04016ae3 0x7d81c983
+ 0xdeb79060 0x950e14e6 0xab7833c9 0x297e8abe
+ 0x49252831 0x489acc6f 0x9ed63fab 0x3166416d
+ 0x97319343 0x28ad40d7 0x3fbb9b52 0x203c7460
+ 0xe03bf6a8 0xbe288f65 0x8183b5d7 0x3752814b
+ 0x57405958 0xb4b3ab8d 0x235ba207 0x20bf3240
+ 0x9ea6da77 0xb8f77bf6 0x83d7ce90 0x5575d3de
+ 0x21f46a2d 0xaba56e91 0xb5657416 0x6ed3bce3
+ 0x1cf28b50 0x7e3f8573 0x76ed8028 0x8c785c22
+ 0x5a0fec15 0xbec7ac15 0x3763a0c6 0xd0fcfcdb
+ 0x39581ba2 0x386e0e74 0x4336b4a8 0x4bcc5176
+ 0x314b2da1 0x2ec76c38 0x2a517be5 0x17ce6f78
+ 0x7f124d6b 0xc68ce86a 0xac7d29f3 0x7ea7cbd0
+ 0x053169e4 0x4c0d5e6c 0xe39aa81a 0x083a39bd
+ 0x6d71ce68 0x7c50cc9b 0x10aa72b9 0xdd11c952
+ 0x43bea88d 0x9c1ddab6 0x41b013af 0x1e98de66
+ 0x554b92a3 0x86bac233 0x50fae8f6 0x358742c8
+ 0xa80c50d9 0xdfe9302d 0xc9b4c715 0xdb4b1c66
+ 0x78b7d75b 0xadde8aa8 0x59c09d74 0xa46b87d0
+ 0x548cc5b2 0xf9b8b729 0xa738e8c3 0x1c5a00e1
+ 0xd9c2d59a 0x8d1cc5de 0x05bae2e5 0x0ecdfd2e
+ 0xab3a984e 0xcf53db57 0x3ebc3c88 0x6b60e477
+ 0xa112a3b0 0x827400c9 0x9e7d8495 0xea378c48
+ 0xb19eaf60 0xdfe2da05 0x796b70f0 0x6c595e5c
+ 0xc0600c02 0x9e038536 0xea914072 0xa53e20b8
+ 0x30ab9653 0xb0bb4beb 0xce3d842c 0xb2a5cc91
+ 0xaa6f847f 0xe2aa1414 0xeede8231 0x067d99da
+ 0xa5638b21 0x27ac1f32 0x2231ada1 0x5ca081e4
+ 0x8e30a578 0x21f9f43d 0xc3b5ea88 0x1f1a9d74
+ 0xf7faba90 0x8163a801 0x09b1dcd6 0x3419385a
+ 0xd4ecb2e1 0x33e9df04 0xd5659af7 0x9eea6e2e
+ 0xf6ae859e 0x7c268181 0xaa07ea78 0x892c1c42
+ 0xe66a5fe0 0x9e7f5446 0xf18c42cb 0x49c7296a
+ 0x671484a0 0x3bdf31e2 0xed31d1d1 0xc2e8900b
+ 0x1175996c 0x70a0c04f 0x0394f2c4 0x070d9ca3
+ 0xc67229d1 0xcf29d228 0x4fd61fc4 0x92aa5df4
+ 0xa88afb58 0xb683a2c7 0x16239fe4 0x84bb685b
+ 0xb09cdc69 0x58be548c 0x99f0c940 0xa54bae2d
+ 0x108d7ccf 0x08773f13 0x4ba953c8 0xd290c27c
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+ 0x8f52ca2c 0x3410f445 0x47847239 0x519adc73
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+ 0xe806d835 0x199ff3d8 0x615fb809 0xa6d8aa7f
+ 0x64f3fdf1 0x6d048b33 0x69967629 0x2036eaf5
+ 0xd2514a6d 0x1719f81a 0x8030c9aa 0x3b1623af
+ 0xc8990859 0xea7d5f87 0x925fddd1 0x3470f55e
+ 0xcc4c6a72 0x4e94dba8 0x51861bfd 0xfc3aa50e
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+ 0xa5f9f219 0x7023a821 0x7223e7ef 0xd63c008e
+ 0x29ddf8f4 0x586ac4ea 0x8f734809 0xbf22ff2d
+ 0x1c9b1aef 0x4249d5db 0xc4140c09 0xc927aae3
+ 0xf6c17d0d 0x822bd729 0x1ea56fbc 0x941240f4
+ 0x93a2e220 0x8596eba8 0xb9dc285a 0x58343237
+ 0x649f47b3 0xc214fb8a 0x1aceb84c 0x8a311f8a
+ 0x408e4b98 0xd0401a07 0x99fe7a30 0xdba70218
+ 0x6eabcecb 0x963f4937 0x4c980ab1 0xb1700cb8
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+ 0xa6b9139c 0x9446b26d 0x4920adab 0x7cb94980
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+ 0xd99aa4fc 0xebec0bf5 0xf10d6c52 0x5d97f82c
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+ 0x10d94541 0x68d5c5a2 0xee34f623 0x86536280
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+ 0x0296fd66 0xcf07611f 0xc27022bd 0x34aaa9c9
+ 0x0ad7b71d 0xb13ec602 0xabd244cc 0x3d3387f0
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+ 0x6f43f262 0xf7cf6cb4 0x7c87a2c3 0xcf4b7cb4
+ 0xb7f72f04 0xc21d35bb 0x570fa807 0x4a500ff0
+ 0xd157fa61 0xace9ab6c 0x66b98d3f 0xdd59c459
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+ 0x7212c942 0x09040eba 0x0c199ae0 0x3f41b3f9
+ 0x8d439401 0x83319b2d 0xf3deffb4 0xfd813e2a
+ 0xa8ac6a50 0x72858022 0x5650a6ea 0x8b9e18a3
+ 0x7dc2d48e 0xabf0c35c 0xe9d93f5c 0x228412d4
+ 0xa7b07016 0x0babb01b 0x36faa524 0x3157fe90
+ 0x4cf0fd08 0x1272a76a 0x8e701e54 0xd1ed3067
+ 0xe92bc6ac 0xea2fcc5d 0xdae1a6c7 0x4ec3465f
+ 0x97556141 0xda282893 0x2bdf77f3 0x458abb7b
+ 0x8c98d27e 0x9f2ddc8e 0x4bf66134 0x7ef33d1d
+ 0xe7bfef39 0xa9b37d3e 0x2272b785 0x41bc32d3
+ 0x16790e7a 0xfcd172a9 0x4dcbdb4f 0xadc6cea4
+ 0xe72aab79 0xd3a530cd 0x153171ea 0x60d6122e
+ 0x1b00ebde 0x366861f2 0x6781fc14 0xe6d6189c
+ 0x3b9beebb 0x5c239e07 0x51999573 0x5b900c94
+ 0x52a14fae 0xc7c0bdfb 0x5bebb646 0xaaebca2f
+ 0x360c6d2f 0xc8b43453 0x16ae683d 0x11248d2a
+ 0x08fa3017 0x2bfc636f 0x7360ae91 0x793ad23c
+ 0x7d2bc4bc 0x2d505664 0xee449c94 0xbd0beb6a
+ 0xa9b818e7 0x251354ca 0x119825e5 0xae8b8d2c
+ 0xeea15a2f 0x8b3c47ad 0x2af74ac7 0xaedb8156
+ 0x9b96ee47 0x05034a2f 0x752f8722 0x0f1ee372
+ 0xff55b4b5 0xd12d4ead 0x554c31c4 0xc167849a
+ 0x118d9c61 0x9825a5b5 0xd1941592 0xa21440d6
+ 0x0c8fa874 0xd23ff93c 0xf592f75b 0x6d171131
+ 0xe1cc848b 0xe73fe5cf 0x38677f4a 0xddbbd004
+ 0x6af79754 0xa666b38e 0xf5afba55 0x036b1f0b
+ 0xd55860f2 0x1efdbe6f 0xafc557a4 0x3b24c27d
+ 0x68f319ef 0xf863285e 0x80e88563 0xbe2af6a4
+ 0x81360909 0xcfbaac9a 0xa0a07505 0x8c653634
+ 0xf630bc25 0xdea1640f 0x51445022 0x8bd02194
+ 0x593185c9 0xc23f98f1 0x06b6d384 0x432278ed
+ 0x9c422519 0x0664dc91 0x733e7075 0x9e05a4c2
+ 0x1b014110 0xc4787233 0x4aad488b 0x756f0d47
+ 0x9e29a6df 0xabde4b5d 0x23727bdb 0xf1e3a05d
+ 0xa1f22c40 0x2d290090 0x62d3b212 0xcc247195
+ 0xcd5c84a1 0xf277c61f 0x4f9f213a 0xa69e7391
+ 0xf09f4162 0x44771471 0x6be202f9 0xf27e05bd
+ 0xef27ffc6 0xb94d8b95 0xcc124e11 0x6d22e955
+ 0x8c572ef0 0xc59727f0 0xa68aa858 0x034de5f4
+ 0x242700ae 0xcad4225a 0xb5e792ea 0xf791ab32
+ 0x8f75a863 0xd078bb02 0xec889a62 0xbae59fa8
+ 0xd0e96b37 0x7127e3a9 0x69283a7c 0x7fe26fca
+ 0x3b33f97f 0xef3bfad2 0x0a33c011 0x060e0e58
+ 0x27de1402 0x55f0b8c9 0xf48de31c 0xacbc1c7e
+ 0x228459e6 0x9119a04c 0xeae173ef 0x50347a6c
+ 0x6da1ae72 0xcea1256b 0xc328fe6a 0x85a48b53
+ 0xd8bdb49b 0x857cd611 0x2218a975 0x4893fbe3
+ 0xbd0b7590 0xdc35b430 0x0b37d8a4 0xc1938a77
+ 0x78423be3 0xbb14bb91 0x0c900fe5 0x82037d1e
+ 0x1fc0a8c5 0x5b83cd7a 0xf1a7ff8d 0x36cb83e6
+ >;
diff --git a/arch/x86/dts/microcode/m12306a5_00000007.dtsi b/arch/x86/dts/microcode/m12306a5_00000007.dtsi
new file mode 100644
index 0000000..de50372
--- /dev/null
+++ b/arch/x86/dts/microcode/m12306a5_00000007.dtsi
@@ -0,0 +1,618 @@
+/*
+ * Copyright (C) 2013, Intel Corporation
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright notice, this
+ * list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright notice, this
+ * list of conditions and the following disclaimer in the documentation and/or
+ * other materials provided with the distribution.
+ * * Neither the name of Intel Corporation nor the names of its contributors may
+ * be used to endorse or promote products derived from this software without
+ * specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
+ * THE POSSIBILITY OF SUCH DAMAGE.
+ * ---
+ * This is a device tree fragment. Use #include to add these properties to a
+ * node.
+ *
+ * Date:
+ */
+
+compatible = "intel,microcode";
+intel,header-version = <1>;
+intel,update-revision = <0x7>;
+intel,date-code = <0x9092011>;
+intel,processor-signature = <0x306a5>;
+intel,checksum = <0x8e38731>;
+intel,loader-revision = <1>;
+intel,processor-flags = <0x12>;
+
+/* The first 48-bytes are the public header which repeats the above data */
+data = <
+ 0x01000000 0x07000000 0x11200909 0xa5060300
+ 0x3187e308 0x01000000 0x12000000 0xd0230000
+ 0x00240000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0xa1000000 0x01000200 0x07000000
+ 0x00000000 0x00000000 0x08091120 0x71080000
+ 0x01000000 0xa5060300 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x27649db1 0x904b6445 0x6acff7e8 0xc4ac0631
+ 0x6830ec45 0x3aece98d 0x97bf40c8 0x83b8fef0
+ 0xdb01345a 0xceecca42 0x5ee7d8b4 0x24afdbe6
+ 0x5fb36178 0xbc17d76b 0x31b7b923 0xc81aec82
+ 0x647b3320 0xf1db9653 0xff3b9759 0xe9c74b72
+ 0x3b193752 0xc147860b 0x160e0d6a 0x5bdb9dbf
+ 0x1ccce2ac 0x387670ad 0x2f106f05 0xf8607ea3
+ 0x42562576 0x30e086fb 0x409a06b8 0xf1957736
+ 0x5eb03f65 0xad147fab 0xe1a8e8b6 0x208d59d2
+ 0x683fba2e 0xf172b378 0xf8138dba 0x61e81d1f
+ 0xd551f997 0x28c79780 0x04f9db27 0xa80679b9
+ 0xaca4e7ff 0x6876944b 0x26d7dbc1 0x77f7dc2a
+ 0xf0bcb163 0x1b2a8e81 0x7b90aa49 0x8d5eaf2f
+ 0x522384ae 0xae7f7082 0x412ba10a 0x1ce1baa0
+ 0x478c29b4 0x9c09b4d2 0xf225f64f 0xd43026cd
+ 0x81098579 0x7df5db05 0xa5815bb0 0xc73ee756
+ 0x9738cb95 0xa5bd62e2 0x88e2c6b2 0x778e7fcb
+ 0xd3bdb872 0x9404403f 0x5be6ad63 0x71dc4abc
+ 0x11000000 0xb290ba8e 0x6671b099 0x7834fb60
+ 0xe02e439f 0x55712161 0x5dca20ba 0xb62c06df
+ 0x83d86103 0x35cbe438 0xeb7841c9 0xded7ad9a
+ 0xda76b9f2 0xa39233f5 0x11377a10 0x6928a0e1
+ 0xf6164be1 0xab9cb400 0x0ac5e864 0x978e6cdc
+ 0x51d9070c 0x3786d896 0xa6b103d0 0x288c8c83
+ 0x9c644099 0xf9a8a7ad 0xd2a96566 0x2e985d7e
+ 0x3531b0b8 0x3906909b 0xce3878c3 0x30b950a6
+ 0x536b312c 0xb9f07473 0x29366b16 0x7a515f52
+ 0xce7d21ff 0xfe5aef73 0x69b91f78 0xd50b9686
+ 0xa384ac5c 0x6e90981b 0xc37028fa 0xc448c695
+ 0x3c5275e0 0x2ea780c0 0x5fe9aeb5 0xa733e8e1
+ 0x2a04c422 0x68243f2e 0x5311d43b 0x93c27dfc
+ 0xc78b431f 0x9a7bd54e 0x7731f225 0x0f71db56
+ 0xf89a8f8c 0xc5eb2d2a 0x45f973ec 0xbb0635b3
+ 0x5b825acf 0x8744ccef 0xceb1dfca 0x5e5b882f
+ 0x356cfd00 0x68e42c02 0xf0ea6e97 0xa0c1327c
+ 0x5fb06338 0x3e7df893 0x5c3eb0ec 0xac7cc79f
+ 0x3dee3b4b 0x313a2915 0x4002db54 0xe8a96a04
+ 0xb79c367e 0x6d53a3a8 0x9b2720c7 0xf5e7dee4
+ 0x357fc3d7 0xcfc9b54e 0x72f9732e 0x3ccbe991
+ 0xe0486033 0xabeab549 0x032089b2 0xeb1467b3
+ 0x3898e23d 0x4f25f3d4 0xe2f64597 0x3e7facd4
+ 0x455514e6 0x99dea4e4 0xc1201200 0x72d68181
+ 0x25046d7e 0xd3b6ada4 0xd3f358b2 0xb6a0dcf5
+ 0xfbf43626 0xd9cafa7a 0x27ec8d4a 0x84d60c14
+ 0x35e79275 0x413169be 0xbc9847c4 0x0ddcad0f
+ 0x5e098c03 0x03187763 0xed64abff 0x8eaada0c
+ 0xdf378018 0xf394b0fa 0xd4abca64 0x3ad203b6
+ 0x1347cdf9 0xffaf1040 0x078c6baf 0xf2e7d31f
+ 0xdfc334c5 0x061d2348 0x85877503 0x561b6cef
+ 0xfc9aa2ed 0x6057d0b6 0x288df59a 0xda7c47f2
+ 0x727a8584 0x58f74d64 0x8afa48dc 0xf50d3582
+ 0x9f42eec8 0x776d1b6a 0x35f42768 0xbdb7f7bb
+ 0xa239bc05 0x1d26bcce 0x025568ca 0xa2ef8189
+ 0x0054417e 0xf9aff2b5 0x56cc33be 0xed695186
+ 0x58b21d0d 0xea2215c7 0xa565b724 0x2931c422
+ 0xe20b2043 0xa85a082d 0xd7760789 0x58c317cd
+ 0x8c500d70 0xecd22975 0x79542e54 0x790b048f
+ 0xcbbc98fb 0x125b81f9 0xe3e74009 0xc6f4ebc8
+ 0x1e22f4b7 0x0485cac9 0xeb4dc6c9 0xab9076a3
+ 0x9feccd38 0x733e57dc 0xe250d25c 0xf0eb5a8f
+ 0x3db33c3c 0x36c52b3b 0xfe5f92fa 0x0ddc38bf
+ 0x003c6542 0x154abb1d 0x4feb8d85 0x6aae78dd
+ 0x59282b12 0x04fec81c 0xf6f117c7 0x7123b56e
+ 0xd8c53d48 0xff2eeac6 0x09716dee 0x5d24cb13
+ 0xae7c77ef 0xf0213c38 0xd7290320 0xfe3ce627
+ 0x9402607f 0x42ebf5c3 0x4b25a536 0x7167f997
+ 0xe456ed20 0x5a8ed54c 0x8f774e9c 0xa9f1bf83
+ 0x2322ca10 0x3bd6021f 0x2ad0affb 0x0a727ca8
+ 0x228cf77f 0x19f54f70 0x2b7cc811 0xa7193b61
+ 0xcc097688 0x395a8700 0x073e2b6b 0x8e90c718
+ 0x0855f8c6 0x7de3d62b 0x2f582aee 0xeb8667b7
+ 0x6a09f600 0x119a656a 0x7502100c 0x36d51cb0
+ 0xb398a2fe 0xce1a11fe 0xa75b725b 0xf8d69c5a
+ 0x69b6a07f 0x3b5e712b 0x07d647d0 0x80bbe6af
+ 0x80cdefb0 0x03ae17e9 0xda7da860 0x39610997
+ 0x67afea64 0x2d141230 0xd845efe5 0x346b9c22
+ 0xf03d45ce 0xa7f96ffd 0x21bbd7fd 0x035297c4
+ 0x27b88b33 0x8ff80f90 0xa41161cc 0xe38a33d1
+ 0x3d12c73c 0xc81ca705 0x55bb79a9 0xc80037b2
+ 0x2b1b7c7d 0x47ccc91e 0x440370f4 0xb754bfe2
+ 0xf9774b91 0xa8d2fa85 0xb7db3a31 0x102a7131
+ 0x61a200b0 0xea8bf0f9 0x826ca613 0xd3842856
+ 0x27fa5f1b 0xdc6f7aa8 0xc4351ff1 0x13e8d56c
+ 0x3b81f6fb 0x444bb6a0 0xb5fadf26 0xf1e0fd81
+ 0x5c75fa49 0x1e66f533 0x74f83da7 0x749327f5
+ 0x1f41d35d 0xabb10c2c 0x15ff553f 0xbb5ad732
+ 0x904b2bde 0x6eb6c5d7 0xc38cef3e 0x5b62a4c7
+ 0x4c1d0297 0xeb0d88e3 0xe147c6c8 0x726bde4d
+ 0x2cce53ca 0x2e0ad784 0xb5ce9c2e 0x04fa3a1c
+ 0x85fdc1ba 0x87a73107 0x3b1a12db 0x84f7c886
+ 0xbb9c65d3 0xf319fa80 0x8684ad1a 0x8b675754
+ 0xcefe8be8 0x19fb7f42 0x9fbc80de 0xea169c83
+ 0x7aeb705a 0xee25f4ee 0x2f51d222 0xe553b558
+ 0x3bbc3526 0x9b99ac52 0x97b7fa61 0x997ff0fd
+ 0x1d90099d 0x611d8fdf 0x180e1256 0x02436dd8
+ 0xf5c0088b 0x977ce145 0x3e22559a 0xa7434bbc
+ 0xbc0af767 0x61f2adbd 0x6b414aa5 0x23256487
+ 0xcd90a1de 0xa212e85f 0x5a8cbfda 0x901ce98d
+ 0x58784538 0x3a02ddb2 0xd388d8fe 0x18e21114
+ 0xc0ce52ac 0x10eb99b3 0x434dbf0d 0x9fc25de8
+ 0xf4166b7d 0xf520d339 0x80889748 0x36c5122f
+ 0xb0f53d62 0x78f18c2b 0x10b7e0ec 0xb515926e
+ 0x70065726 0xd83b26cb 0x284b191e 0x33c4a3f7
+ 0x97998f96 0xd7458672 0x5e23c14e 0x78a584f9
+ 0xa334e7d1 0x8fcf2992 0x0d7748be 0x3d5e9309
+ 0xa4a46124 0x536108b4 0x57af0c09 0x7ec11806
+ 0xd6b8c03b 0x8618900f 0x6c1c60bb 0x9650af3b
+ 0x83b8c109 0xfbe91320 0x681cc792 0x76fb441f
+ 0x69eace4a 0x66563862 0x86a7a909 0x59815c86
+ 0x604c949f 0xba39a0a4 0x51a1322d 0xaff2a150
+ 0xcba82656 0xc82a79cb 0x9eaa5989 0x5602a25b
+ 0x91917c30 0x46e610b4 0xcb698616 0x571cacc8
+ 0x642c25fd 0xc61a5c96 0x5c0d7b2b 0xb22e2868
+ 0xc5697ac3 0xf69795be 0x9aa5f24f 0xbd4c0815
+ 0x61e63957 0x9a2c3a0c 0x452bd662 0x06ce51e9
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+ 0x04bbf199 0xa11ebe8b 0xcf862106 0x75f9410f
+ 0x4e573a0f 0xd37b1822 0x45e821b5 0xa72f103e
+ 0x87d41b9a 0x751c1360 0xa3d9bf04 0x38817c3b
+ 0xa1243092 0xeaffa979 0x315d68ea 0xdf4544d4
+ 0xd7bc8ed8 0x4200e14f 0x46cb8d5d 0xe53e695a
+ 0x20fdcc05 0x7bc91fc1 0x21a08c38 0x70377159
+ 0xf000b852 0x010b2051 0x64f27dae 0xa5d40c9f
+ 0x0d2d05db 0x035026b4 0x4dfd9dc6 0xe1ba51b6
+ 0x182921b3 0x3a14fd50 0xfd822b9f 0x1c475677
+ 0xa23ca2d4 0xa4471500 0xb0a3425d 0xc384422e
+ 0x1791bb5e 0x300db057 0x015cdb9b 0xa9254782
+ 0x850a6ed2 0x939270a4 0x6173f301 0x59c678bd
+ 0x8dc33d87 0x8ea24bbe 0x8ffaf807 0xd132392a
+ 0xeb824b6c 0x6dc0e254 0xba2588ea 0x83c5b65b
+ 0xed46fa12 0xc9932295 0x6feb2198 0x74cef43c
+ 0xda34147d 0x338e8acd 0xb6bc8ae3 0x62eeeb57
+ 0xcfd703ec 0x0fa51fb7 0xe6dedfc6 0x06e05089
+ 0x0cd711f6 0x43f73969 0xf43b945e 0x1a63c878
+ 0x366aa911 0x946e06d0 0x8ff0d6f5 0x99e7a128
+ 0x96bf8c82 0x93ffc377 0x9e7d65a8 0x6ef2f639
+ 0x57ac2e72 0xd0d643e2 0x228bc4cd 0x76f8d2a3
+ 0x2c845f50 0x830d3729 0x58d7485d 0x0024caa6
+ 0xac3a5590 0xf18e17a6 0x684dc526 0x6c727c92
+ 0x9abaaa66 0xbd78b8b8 0xac5a3426 0x15c1111b
+ 0x0ee1a7c1 0x665f4531 0x617e891f 0x3285e4d5
+ 0x4cf347dd 0x7b66024a 0x081de006 0x1005600a
+ 0xf124826a 0x2fcb5728 0xc1ddc0de 0xbd7c76d8
+ 0xed4d9ef0 0xaeb0472a 0x2b07a2b0 0x3737ffed
+ 0xd40ef124 0xd1c577fc 0x58076c85 0xb88a0dc0
+ 0x87a5020d 0x062dc1d0 0xb7c62806 0x9aa2c8cf
+ 0xca896ae8 0x40ff25d1 0xe97e160f 0x9f55451b
+ 0x9ba07423 0x6c93a22f 0x55f124cf 0x39ef755e
+ 0x04dac73b 0xa8e8c97c 0xf97d7be2 0xd6200b18
+ 0xf9299b79 0x86abae89 0x661f5e34 0x7317dfda
+ 0x38dff8e7 0x9cea93ba 0x503971a0 0x2837691c
+ 0xbf4eb209 0xa20ce894 0x255c4fff 0x74180a05
+ 0x3c5715da 0x017ec40b 0x6f580634 0xaab316b4
+ 0xcaf9fe94 0x3ca6b65e 0x74015cee 0x4a3ca213
+ 0xa7db4345 0x5a2bb90c 0x2bc01b3e 0x8949fab9
+ 0x548cbb0d 0xf8fda387 0x6e833630 0x786ab073
+ 0xe6fa5787 0x0a659d86 0xe75b17ce 0xf2d07498
+ 0x2ab3ef78 0x74b31ba9 0x623e7ee5 0x1dd7ac63
+ 0xf30617ca 0x34385e0c 0x5cffcadd 0x97bb21b4
+ 0x0aa7cae5 0x679e83e2 0xd15be3a7 0x35a68299
+ 0x7bb0a530 0x33f4793d 0x098b4d9e 0x10123f64
+ 0x39dfe4c1 0xc826ca0c 0xc0f0959a 0x8ab66a8d
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+ 0x0ac46c4f 0x87bfbc2e 0xaf4161d7 0x80a1d020
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+ 0xcab7df61 0x2fb9080d 0x48175e89 0x25133092
+ 0x4a0229e5 0xf88ec53d 0xac24abe7 0xb84598f8
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+ 0x5ac3e6cb 0x66234a29 0x2c26aacb 0xfcb4bb99
+ 0x204c226c 0xc20561ac 0x1e5bffaf 0xaacafe8c
+ 0xf03bfa31 0x0dbe0396 0xd7561d7f 0xb53794dc
+ 0xfe641d5e 0x54e48453 0x611700e5 0x0639b5cf
+ 0x7028a7ef 0x6f3be4b7 0xda5b1755 0xc988199a
+ 0x48497e7a 0x4e3cf3fe 0x99d212e3 0xbd2b89e6
+ 0x98b4ef8a 0xeef8e602 0xef153f89 0x143151c2
+ 0x90557d9b 0xe6a8ef65 0x2e380066 0xe54ac324
+ 0x8e8fc6dc 0xc23f7add 0xaf1fb336 0x3e60c29a
+ 0xe1d56ba3 0x8f654c53 0xf30e755d 0x3b4fa485
+ 0xf8ab5ed0 0x77336bd7 0x56489149 0xc284403e
+ 0x86801f98 0x5a4230ca 0x3af70662 0xfd8ce85b
+ 0xf6adfca8 0xe8cd1021 0x203bbbd2 0xdbb3c8c1
+ 0xe08a736a 0x29a9b3fa 0x3ac18aa0 0xa109b619
+ 0xc7fdbc67 0x161ef5b0 0x6efe8dc1 0x3b9214dc
+ 0xda2ef14b 0x4beec8ac 0x587806a1 0xe796b93a
+ 0xcd1efc91 0x3402e472 0x77150586 0xf8b4381e
+ 0x9d8bfae1 0xfb07a3e9 0xe84d8f52 0x97b0ea6e
+ 0x3e082a35 0xf4b05402 0xd29d4891 0x7da3c1d2
+ 0x3ea5fb56 0x78785f7f 0x6b09f74e 0xd4055e3e
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+ 0x72427d25 0x9492c7ad 0xaed29771 0xdff35edf
+ 0xbdef0a5e 0x5d9d2f18 0xa0bc1ee9 0x0c397a65
+ 0xc911d530 0x481d294c 0x1a84ce5d 0xf5a5504b
+ 0x22cfca7e 0xaff7e8e9 0x0394d9b1 0x7832305b
+ 0xf853d344 0x89571b4e 0xd2e2bfdd 0x0c72e467
+ 0xb236aea0 0xde6cabce 0xfce515d5 0x0f8c4779
+ 0x3c74d971 0x81b0b3e3 0x2d4c4ecc 0xf4da0ae0
+ 0xa0947a82 0x47609cd3 0x6f81ad8f 0x2bf75b0c
+ 0x46cf40b8 0x344f9edf 0xbad2a5af 0x9e13f884
+ 0x205ea013 0xd54fcb5d 0x20a86658 0x739cfb67
+ 0x7971ea26 0x7841375b 0x649b81e7 0x31ab0179
+ 0xb0730487 0xdba21463 0xa5f6cb07 0xd4f92687
+ 0xca5fbcda 0xc8de464e 0xc7263f7b 0xb93678db
+ 0x1b3ca8dd 0x4636a901 0xd4a16614 0xf96c26e1
+ 0xc58c8da6 0x2965c74a 0x59ff32cd 0x4d77e88e
+ 0x23843ad3 0xa85b9246 0xfd2d5bef 0x1257bf58
+ 0x9c0aa762 0x9ec8ac35 0x77d9bc0a 0xa2bbdee5
+ 0x56d690cf 0x5cdc4461 0x3ef6afed 0xaeb51f80
+ 0x492d6fc9 0xfe4df4b1 0xce23606f 0x40eff82d
+ 0x715eaa41 0xa4e8b2ad 0x19c3e72f 0x9333d4f2
+ 0x9b902cf0 0x70c9bbd4 0x9901f889 0xc342ab6d
+ 0xd36492ae 0x38dc739c 0x0928ffce 0x8d724b2b
+ 0xd5b29bbc 0xa0ce992d 0x8856178b 0x026948bf
+ 0x08809e04 0x541c960d 0x210b71e0 0xf1b9e474
+ 0x85bca8cc 0x90ce42b7 0x6682b7d8 0xe0c50c48
+ 0x25a8075e 0x33dc1ab1 0xf0ff1627 0x89d6d8e9
+ 0x4790ebbb 0x7ba5cfb5 0xe97327bb 0xb06fa0d6
+ 0x7db34b48 0xdf96d115 0xce3fb871 0x03b1557c
+ 0x7eb6d43c 0xceaf3826 0x247e0851 0x840637d2
+ 0x9f979955 0x08f67a6a 0x525d8295 0xdee447c9
+ 0x91ed75bc 0xe4960419 0xb9700051 0x0344b46e
+ 0xbd6b6827 0xa38ab219 0x817e8ba0 0xe86dd20f
+ 0xb9240181 0x4765dd8c 0xc59d8325 0x9b8cfb61
+ 0x6632d86e 0xaf8c2a11 0xbc47dcfb 0x26544374
+ 0xe2beca9d 0xf6355863 0x4291bd11 0x94489a1c
+ 0xc52476f9 0x05fb6fda 0x4d315edb 0xa8e285d0
+ 0x0cd624e3 0x599b9d80 0xd21d8746 0x4d9f3528
+ 0x3a634276 0x9a1f1481 0xa5a015ee 0x6639f7bd
+ 0xd5d20e14 0xe90d52f1 0x3318a40d 0xf3f4f5db
+ 0xb92a7eb5 0x2d730844 0x8282ae9d 0x2f369ced
+ 0x5355d63d 0x984d651b 0x47041c38 0xd65d225b
+ 0xfc2c77a5 0x8822efe6 0x49087974 0xff3c04f0
+ 0xcba80501 0x7e6e1c68 0xa7b7421d 0x6b906771
+ 0x4b2b3b5e 0x233421e5 0x78d0d0d8 0x222dad37
+ 0x875b564f 0x336662fa 0x2bfae345 0x47ff9f91
+ 0xb3e7beee 0x3a7ae071 0x3bd0f29e 0xaee9af97
+ 0x6f0d58fd 0xb5147803 0x32a6ea49 0x70a0a245
+ 0x25b0ace0 0x281e4418 0xfcb5553f 0x1151518f
+ 0x50e67760 0x068c8b22 0xbed7234a 0x4120c5d6
+ 0xec22b6d5 0xc600bef1 0xfd9bd4a2 0xa29451b6
+ 0xcd51bac2 0xc1bd0e26 0xe8432d25 0x2deb06a0
+ 0x9ae54a7a 0x536799e4 0xef4fab62 0x4c9f3e5d
+ 0xeda219fb 0x5947eebd 0x2dec73ae 0x11da15cf
+ 0x94ddc24c 0x2c28b710 0xa5c3620c 0x0722dd36
+ 0xedd98464 0xafa8e23c 0xfd750c04 0x829dc6d6
+ 0x6ee56697 0x2cf2380f 0x3cfa8cd6 0xfa42971f
+ 0x415ad936 0x0b1fea9a 0x65c8b5d2 0x1a5828a6
+ 0x4295092a 0x54596d12 0xa419acef 0xefeddbf9
+ 0xcabda915 0x053abb3c 0xe4b38d10 0x141d9ebc
+ 0xcceb3e75 0xa4fdd9cf 0x9450f718 0xe2a7e7e0
+ 0xbf98f6a0 0x4885a7d5 0x53f871b3 0x0a57e4cf
+ 0x22b36b98 0xd705d611 0x12db0f11 0x546186e1
+ 0x2629257f 0x74587452 0x2659526c 0x2913ca70
+ 0xb3d5b27e 0x1040c827 0x18a192d1 0x2731ba8a
+ 0x5865a15d 0x12b9dce7 0xd0b05fea 0xe35d2de2
+ 0x0f1fc309 0x28df230d 0xcac0338a 0x724f0b25
+ 0x0a36bfeb 0x4c196443 0x392068ee 0x8cc1a2d9
+ 0xbc4f0871 0xea33986e 0x22e90aa1 0x2a43d9e3
+ 0x81214348 0x3745f469 0xaed24012 0x092a728f
+ 0x6b5bb659 0xb46d810d 0xc146cfa5 0xdd3e6954
+ 0x20d6283c 0x0a47baee 0x45aa3873 0xe2c0795b
+ 0xf1cb3519 0x566f951f 0x5e34314d 0xab31c4f1
+ 0x10e0b305 0xfa7d0a3c 0x9adc26fc 0x55fc8af5
+ 0x90314c7d 0xa54954f9 0x27cc0f21 0xbe30da42
+ 0xa04432b0 0x670e176c 0x904a4df4 0x4342618d
+ 0x8b43d3f8 0x086fbc28 0x54954d7a 0x73502d23
+ 0x2ebbaa2e 0x2549f553 0x06946ef5 0x61b621d4
+ 0xafde5d4c 0xbc0faabe 0x0e110c04 0x44ddda52
+ 0xad3883ba 0x1464c595 0x3c5d9f28 0x95573165
+ 0x3e92db93 0x41f19b03 0xb60a4c71 0xf519a623
+ 0x5dc2b562 0xa822e25d 0x09ba6793 0x5e3f5958
+ 0xb80ae32a 0x3f2a8120 0x50cab916 0x8a2664c7
+ 0xe9a0730e 0x74ef9c02 0xbe1b891b 0x8cdeb1cb
+ 0x8f05f87e 0xf4ebaee8 0x12fab9dd 0xfbc8ab3c
+ 0xe6d443b8 0xbaaf9253 0xa4b28356 0x3a105c02
+ 0xb3ceb634 0x26c2d231 0x1e509d45 0xb010dc16
+ 0xbaed93e6 0xffd995a5 0x2274c579 0x081c20f5
+ 0x0e890545 0x9bf20a67 0x534d1668 0xbe0d8a9e
+ 0xe6a3b6a6 0xa19826e8 0x8c369600 0x9b00d171
+ 0xdec22ff7 0x0de50b44 0x4ca2d735 0xe9142307
+ 0xb2d75e8f 0x74018651 0x8a93b3dc 0x679f8926
+ 0xf216f6dc 0xaebc58e5 0x820b6760 0x6e49feb6
+ 0x3ad58a8f 0x62ab576e 0x31829e46 0xb1a2bd35
+ 0xd3db9735 0x248c8e9a 0x8db52fa6 0x8b65b2de
+ 0xebfee08e 0x0d2bdaa1 0xb3d9a282 0xde361f30
+ 0xc121c45c 0x12cdcb27 0x8d7ab875 0xcefac8dc
+ 0x573f8424 0x783fb263 0xbc2d8f2f 0x04f05791
+ 0xa880912a 0x22042163 0xb7891d1d 0x27a3b82a
+ 0x70e35ee9 0xb0b74dc8 0x72b51ef4 0xc074941c
+ 0xeb765569 0x8fba1f5b 0x044aaefa 0xc0db48d0
+ 0x31bed72a 0x7f5ad220 0x132e1da0 0x4cc7e7b5
+ 0x145a80c6 0x39367173 0x0689d163 0x96822f9a
+ >;
diff --git a/arch/x86/dts/microcode/m12306a8_00000010.dtsi b/arch/x86/dts/microcode/m12306a8_00000010.dtsi
new file mode 100644
index 0000000..0672ff1
--- /dev/null
+++ b/arch/x86/dts/microcode/m12306a8_00000010.dtsi
@@ -0,0 +1,682 @@
+/*
+ * Copyright (C) 2013, Intel Corporation
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright notice, this
+ * list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright notice, this
+ * list of conditions and the following disclaimer in the documentation and/or
+ * other materials provided with the distribution.
+ * * Neither the name of Intel Corporation nor the names of its contributors may
+ * be used to endorse or promote products derived from this software without
+ * specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
+ * THE POSSIBILITY OF SUCH DAMAGE.
+ * ---
+ * This is a device tree fragment. Use #include to add these properties to a
+ * node.
+ *
+ * Date:
+ */
+
+compatible = "intel,microcode";
+intel,header-version = <1>;
+intel,update-revision = <0x10>;
+intel,date-code = <0x2202012>;
+intel,processor-signature = <0x306a8>;
+intel,checksum = <0xe44a4ef2>;
+intel,loader-revision = <1>;
+intel,processor-flags = <0x12>;
+
+/* The first 48-bytes are the public header which repeats the above data */
+data = <
+ 0x01000000 0x10000000 0x12202002 0xa8060300
+ 0xf24e4ae4 0x01000000 0x12000000 0xd0270000
+ 0x00280000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0xa1000000 0x01000200 0x10000000
+ 0x00000000 0x00000000 0x17021220 0xe1090000
+ 0x01000000 0xa8060300 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x00000000 0x00000000 0x00000000 0x00000000
+ 0x493d401b 0x64106cf1 0x0ffc7f0f 0x9b4b97f6
+ 0xb8fab9c2 0x46353316 0x0247d91b 0x3c36c361
+ 0xdb01345a 0xceecca42 0x5ee7d8b4 0x24afdbe6
+ 0x5fb36178 0xbc17d76b 0x31b7b923 0xc81aec82
+ 0x647b3320 0xf1db9653 0xff3b9759 0xe9c74b72
+ 0x3b193752 0xc147860b 0x160e0d6a 0x5bdb9dbf
+ 0x1ccce2ac 0x387670ad 0x2f106f05 0xf8607ea3
+ 0x42562576 0x30e086fb 0x409a06b8 0xf1957736
+ 0x5eb03f65 0xad147fab 0xe1a8e8b6 0x208d59d2
+ 0x683fba2e 0xf172b378 0xf8138dba 0x61e81d1f
+ 0xd551f997 0x28c79780 0x04f9db27 0xa80679b9
+ 0xaca4e7ff 0x6876944b 0x26d7dbc1 0x77f7dc2a
+ 0xf0bcb163 0x1b2a8e81 0x7b90aa49 0x8d5eaf2f
+ 0x522384ae 0xae7f7082 0x412ba10a 0x1ce1baa0
+ 0x478c29b4 0x9c09b4d2 0xf225f64f 0xd43026cd
+ 0x81098579 0x7df5db05 0xa5815bb0 0xc73ee756
+ 0x9738cb95 0xa5bd62e2 0x88e2c6b2 0x778e7fcb
+ 0xd3bdb872 0x9404403f 0x5be6ad63 0x71dc4abc
+ 0x11000000 0xe5ffd18e 0x9c10c032 0xef097758
+ 0x5b44fb3b 0xabbc6973 0xb040312f 0x6267ab0a
+ 0x35ef3655 0x694c0da7 0x6eaf94db 0x293feb5f
+ 0x225a62bf 0x550edd27 0x8e4da670 0x9afcd29b
+ 0x62ad52f1 0xddcdc6fb 0x059e156b 0x9472a491
+ 0x20d8e6fb 0x7041822d 0x5af9c518 0x7e6c342f
+ 0xb113a311 0xdec46650 0x91c8a91c 0x157cde4d
+ 0xec563d5d 0x92470d0e 0x373c488c 0xf18a8f84
+ 0x757fa8ad 0xf8959ce7 0x95e1e3c9 0x47347f30
+ 0xfbd6e4a3 0x18c2f2e2 0xb6c6eb68 0xd2a81838
+ 0xa44964bb 0x36893d55 0x0b411d47 0x5addcf15
+ 0x47584269 0x972c08b3 0x0935b300 0xec7d36a7
+ 0x1c373823 0x487626be 0xacfecd64 0x6688c83c
+ 0xb96f01f9 0x2b6c9719 0x97e955da 0xc4f3b25a
+ 0xfcf12050 0x961bc5be 0x53ebb1e4 0xdc7deaa3
+ 0x3b86819a 0x7c498a21 0x129bc1b6 0x2aa5c324
+ 0x6fb58020 0x0c8e24a8 0xb7c1f0cf 0x37287581
+ 0xf417e311 0x5fd7b8cb 0xe615c56a 0x6a6c6aa7
+ 0x46c97d63 0xcc71adee 0x239b7483 0xea6750f7
+ 0x17bae7c2 0xbf4de5e1 0x6c37a1e0 0x314fc762
+ 0x68bffc94 0x4069875c 0x60d3a593 0x3a923495
+ 0x70f7a899 0xc959db6f 0xfd440374 0x0be4f668
+ 0xc15b74e9 0x9eb15fc7 0x04dc5939 0x1c2d0faf
+ 0x8ca378c9 0x15aaae90 0x2c53e471 0x2ada3977
+ 0x750d6d3b 0xd3e27cdd 0xf63ece4c 0xcbbf9463
+ 0xf0b26aad 0xacc9dc7e 0xcb2131eb 0xc2da14bc
+ 0x01b57719 0x901319e9 0x86b16d25 0x89fe5e27
+ 0xfa3135cd 0x51ebcf8e 0x91b36807 0x6efb87a1
+ 0xbe05489f 0x0461f6c7 0x4f1ddb59 0x007a7e35
+ 0xdde5c360 0xf137a520 0x153d9512 0xebe49940
+ 0xb81727b3 0xdff04ada 0x504811d5 0x6192a2a1
+ 0x418ad287 0x44278f0f 0xc8d70fcc 0x5d5953ca
+ 0xeca4ae03 0xb507f886 0x90a6726b 0xec2c60b6
+ 0xfe003923 0x8cd52bb2 0x87397bbb 0xec98c514
+ 0x28501352 0xd5518d70 0xf3258a19 0x15e4e0f4
+ 0xae272618 0x164ece6f 0x19b5449c 0x2717cf2a
+ 0xffee98cf 0xf18d6c04 0xffb6f744 0x5ed2cb50
+ 0x9421a65a 0x76150be7 0x9689d9eb 0xe6ce395b
+ 0xa5857737 0xe51b5a0f 0x5cc95766 0x365a6f04
+ 0xee8a6d1b 0x219da3e7 0x81004946 0xce4f00f9
+ 0x852eebd0 0x3a39b164 0x96863ddd 0x43b46d69
+ 0x064e138b 0x2ac312a3 0xe7eac082 0xb958803f
+ 0x3138940e 0x4c1d5d99 0x49e9ed02 0xeb3a904e
+ 0x14c2ce82 0x8449493e 0x3cdd6dbf 0xdddb592e
+ 0xaae39fca 0x163c6e65 0xee5a0e52 0xae8c2f8c
+ 0x07fd1416 0x406bd0dc 0x52811c06 0x18316363
+ 0xf954d2eb 0xa8ec83dc 0xe24996e9 0xc92af45f
+ 0x5a73f1d0 0xf5b9948f 0xa6960f5f 0xef3d1266
+ 0x97ac2b43 0x20ce72fe 0x0d774f96 0x29653967
+ 0xca765fe6 0x470ded7f 0x42a9b87e 0x3c9cfb36
+ 0xcd9354db 0x0f2fa889 0xb35e5c71 0xc3da1e0d
+ 0x85f9bfd0 0x1afc94a1 0xf05524d4 0x2b2138ef
+ 0x3c77b905 0x55d26a06 0xcc3a045d 0xad05a556
+ 0xef80f5b7 0x3ca6e8de 0xc40df9e4 0xdc5bdd8a
+ 0xdee9349d 0x258ecbc9 0xa29faf0e 0xf41daab4
+ 0x47af938b 0x6a6a1cf1 0x7a3d2f4a 0x11ede796
+ 0x61f25722 0x6864a35e 0xb4d96fae 0xcdc6a722
+ 0xce64615d 0xef56b252 0x0b89020b 0x2a1ac24c
+ 0x582c3283 0x124f274e 0xf6a58fdc 0x847c262d
+ 0x31517f9b 0x8cd34984 0xc60f7204 0xa94875c1
+ 0x12abf4e6 0xfbdd2b29 0xdb51a1c1 0xb10f9ec9
+ 0xc52b5d3c 0xfa5f75c4 0xb63c6fef 0x8ccd4fe0
+ 0x74b6cc11 0x013babd9 0x0bc30209 0xb1597dcf
+ 0xbda5ac76 0x0371d13a 0x67252505 0xf3081369
+ 0x0d7a4e53 0x25f89a9f 0xd0d9e53f 0xa25d897d
+ 0x822f83e0 0x3008eae6 0x428d3320 0x9890d235
+ 0xfec38910 0x56c87e21 0x7f7f594b 0xdf46866a
+ 0x34a34b40 0x0987267e 0xb47033d1 0x331f5d40
+ 0x935a4ec5 0xab480f95 0x1803d8e7 0x00e2e693
+ 0xab18b053 0x1cf706dd 0x7dda5849 0xb422e2e3
+ 0xba5fd0f3 0x3aee2ce1 0x33b21147 0x5fdec0d7
+ 0xd509d289 0x61187bf4 0xf7687684 0x48edbc90
+ 0x519dcd0b 0x77f026eb 0xc52eb470 0x1d4dd497
+ 0x2fa69c9c 0x8fcfef0d 0x1ed8a0b3 0x9312d199
+ 0x596b55be 0xc8c68e56 0x6aa8dc28 0x3100ec70
+ 0x737bfff7 0x40e51f14 0x695baf1f 0xad786740
+ 0x6278b108 0xcd066fb0 0x74f9d22c 0x9dd7d6f6
+ 0xc9d8d081 0xb82f32ae 0x797beeed 0xa34ce8dd
+ 0xd57ad56e 0xa4bec19f 0xe2cc7268 0xd2b85f64
+ 0x4faf835d 0xda6f3933 0x28397cd3 0x010b5a17
+ 0x6d904bfb 0x26fc2b26 0xdc7b440c 0x4e985f16
+ 0x92fb8abe 0xab8d7b77 0xb906004f 0xb0bdac98
+ 0xee64230b 0xe768ebf6 0x3c96a534 0x4e2aa084
+ 0x5f4c5c4a 0x7bff964e 0x4b4fdde3 0xfc36550b
+ 0xe90220be 0x0056c3d4 0x65599751 0x00c71265
+ 0x83011ea4 0x5bd8113f 0x616bc4ab 0xcdbbfdab
+ 0x187abde6 0xcb0b2059 0x24244c94 0xa05cac8b
+ 0x15e0e4eb 0xe93d7e1e 0xd4016e08 0x8144e1e9
+ 0x1c256625 0x841f4379 0x782edb54 0x6a70674d
+ 0x5de874f9 0x075b423b 0x71a8adc4 0x3f7c5ed1
+ 0xc045ffb0 0xd94e8bbf 0xf7ff3edc 0xb1d3aab5
+ 0x7e78f4b5 0x2e9f0c64 0x17efe45a 0x2a2dd14b
+ 0x9eda4e59 0x2c3689c7 0xe15e5efc 0xf4f11a2f
+ 0x0edb0000 0xf7afa169 0x05558b03 0x1ed6aa69
+ 0x8174d362 0x922814cc 0xcfb1c31c 0xe7cbaba6
+ 0x6aa77d7a 0xea48a37b 0x23b7a2af 0xc2b602da
+ 0x03076aeb 0xef659eb5 0x3c2833e6 0x7dd8521b
+ 0xe80a8ff3 0xe3af24d2 0x6d15f067 0x1c05b90b
+ 0x306e10ea 0xd45b1a99 0xc65a85ac 0xb4ddda13
+ 0x1f2b0bbe 0x716421c1 0x33c2f599 0x0deba688
+ 0xa44de1c2 0x1d33833e 0x3d454600 0x07cdb855
+ 0x57b42914 0x2b3015d8 0xf7893119 0xa754aa11
+ 0xfc8bab1c 0x6aabb3ff 0xeb9a35ba 0x9433e224
+ 0x88225f56 0xb3376d46 0x9203225d 0xfdd591f8
+ 0xb4452f63 0xeccbcf9c 0x60d07a28 0x021f7b69
+ 0xc355e1f5 0xdabc3f4b 0x3a3925e8 0xffc15e96
+ 0xd37cf717 0xbd580830 0x9527f96c 0x91b1119b
+ 0x527baf62 0xdcd8cb14 0xceff6ef8 0x7a64b27d
+ 0xc2bced42 0x62693867 0x171d7869 0x82a502af
+ 0x98c84c3e 0x8a0dd77e 0xcb01c7bb 0x91373992
+ 0xd28e7281 0x487d2036 0x1e98d48c 0x60f56b74
+ 0x3199129d 0xab6205ca 0x95c811b6 0xce78fbbb
+ 0x92f0b76a 0x2a448276 0x975d891a 0x5c945417
+ 0xc2ff2603 0x045c8a04 0xc8b41e0c 0x461623d6
+ 0x640bb5bd 0x386feb24 0x5ecc0bdc 0x1c56fd05
+ 0x3c6b32a1 0xde2d2b8a 0x1f76b23e 0xc78c9108
+ 0x5febf899 0x3c55d772 0x226aa903 0x4916231d
+ 0x44928c52 0x7dfe932a 0xb4420968 0x1997faaa
+ 0xb9a3dab1 0x5bec5d70 0xcb5dba0d 0xcc4052bb
+ 0xfc26b557 0xf04a044a 0x83ad1b1b 0x781935b0
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+ 0xe080acaf 0xf52cb59f 0x0ed69789 0xbc7aae50
+ 0x097d0dc9 0xb250835a 0xac4d2b62 0x72d775ab
+ 0x29ed99ad 0xda94151f 0xd12aaa71 0xd5c01185
+ 0xb51d0b88 0x0c9d6f2d 0xa48394c5 0xdbb2d57e
+ 0x3ae4d70a 0xd6add3d7 0x4b3dc251 0xafd1be1f
+ 0x90687d0a 0x84a07d85 0xe78eca6b 0x68f66aa8
+ 0x6b64a3ee 0x44a0e334 0x8085791b 0xcc8b9893
+ 0x600ef53c 0xa4cb69a7 0x9d30e312 0x1128eb16
+ 0x4d51ce44 0xdc2d0736 0xdf605b7f 0x854b83b3
+ 0x2ee28ee7 0x16c889b3 0x2550ce0f 0x4cff4ea3
+ 0x42b5a123 0x36773c1c 0xde358d32 0x063a64a5
+ 0xca073150 0x8e55ad6d 0x358ee044 0x1afb0721
+ 0x9a3e1062 0x2bbaa6af 0x29679c34 0x7e073a7d
+ 0x3d8e6461 0x8146fcbe 0xbfc9ae45 0x893e8e8c
+ 0x06f5508c 0xad4dc27a 0x8eb524c1 0x089d6e8a
+ 0x06814420 0xf195e6a0 0x5b9651b1 0x7f55737a
+ 0xf23fb3b1 0x270a10c0 0xc6d1adf6 0x16ef7ed1
+ 0x463492b7 0xa71a7736 0xc8685ff2 0x46eebcad
+ 0x4489c299 0xc46ea5cd 0x0ba37c88 0x8e744be1
+ 0xeb2b315f 0xb3c180ee 0xab833e40 0x2223d8a2
+ 0x4e18ba02 0x830b5559 0xc100c3e5 0x89bca4cd
+ 0x43646b89 0xa94d0f31 0x517daa8f 0xf0633802
+ 0x5f2d9886 0x476f3e91 0x80a20ec9 0x65039697
+ 0x58c021c0 0x06adc086 0x9a7a6ddc 0xedd48be9
+ 0x85383dec 0xb5dea0f4 0xd3b438a3 0x20ef6788
+ 0x0334f429 0xc98fbe55 0x11a38f24 0x020f0f38
+ 0x1d6b4e0f 0x4a99af26 0x1af1d8ca 0x0f61b492
+ 0x2df039b8 0xc8db9dd9 0x978c1442 0xd43af75a
+ 0xaba9101a 0x47778b7d 0x58a36cad 0x2b062567
+ 0x1b68832e 0xe730afd3 0xd083acdf 0x4beec818
+ 0xe15e1338 0x134b9a6c 0xe5a65f74 0x82d64ded
+ 0x552ec9e0 0x36ff5ade 0x0eec84ce 0xdff77b21
+ 0xc2337bb4 0xb038c393 0x8661a487 0x1c47bd8e
+ 0x1664330e 0x4793df4e 0xba9c357b 0xbcecf2a9
+ 0xf8484a42 0x89e26341 0xdea84220 0x7173ff02
+ 0xf091e01b 0xd1789105 0x8876a7a3 0x249398c1
+ 0x35a96528 0x2c9cd555 0x8f9026bb 0x4683dfe7
+ 0x0d322c0e 0xcfdeadc2 0x2e6d657a 0x214f7fad
+ 0x1a6feb96 0x70f24984 0x1e2e919b 0x709a412c
+ 0x7c0820e0 0x4372a2e0 0x3a5fca7b 0x7e098692
+ 0xdcdadb6a 0x83bbaece 0xcf7b4ee7 0xa15deb5c
+ 0x0a5cd850 0x76432692 0xd633e87a 0x3b106b75
+ 0xfb1f675d 0xe2d75d53 0xe525819e 0x639ec794
+ 0xaf3fce1e 0x31f7c2fa 0xf62eed9a 0xa581cbe4
+ 0xdcfd3909 0x683b240a 0x5e609152 0xc011e52c
+ 0xe2b40996 0xd4a9c582 0x34f1b16e 0x67fcc219
+ 0x58554b65 0xee82ffee 0x574d2326 0xb3f72df1
+ 0xe75f740b 0x2081271b 0x21039cca 0x274f5ed9
+ 0xad0e16f1 0x92958ca8 0xbc9af36f 0xde0d81c0
+ 0x8e549069 0x7b675ff9 0xc469cd4a 0x7e9286fe
+ 0xad955974 0x5ddaf59f 0xb444e3c3 0x48c0da41
+ 0x08496091 0x13083e2e 0xd769c0e7 0x12c9c1ac
+ 0xad0eaf72 0x9fb4dc0e 0xba8dec9f 0x92ebb8b1
+ 0x17cfb953 0xbd1aa608 0xa7488be0 0x07020299
+ 0x680e40ed 0x8a1eb384 0x337e047e 0xa68e6188
+ 0x8063eb28 0xc3415333 0x4f744899 0x5c55f1d1
+ 0x8f71d1e3 0x06a02111 0x258ecec0 0x1fd1abc5
+ 0x11c9dd66 0xa4dad7d5 0xedaeecfc 0x1b172d78
+ 0x0f433cf3 0x43c8a18e 0x64af2f5a 0x08374214
+ 0x1bd2211e 0x42d44134 0xd45b7bb7 0x7f981a8e
+ 0x8ca78cbb 0xe2f1e4d6 0xb75e239a 0x43be0647
+ 0x374a4e0e 0xd9bb5925 0xcf158582 0xf229203f
+ 0x70b8fb27 0xa245b677 0xd2d8d526 0x192a9510
+ 0x83a24fed 0xdb806e4b 0xd667de62 0x79119c25
+ 0x28a26484 0x259f5647 0x38653837 0x27084263
+ 0x291da1ad 0x08629d2d 0xc645256f 0x5f5bfebc
+ 0x1c2c0a54 0xd29134d5 0xeb5f441c 0x4dcab922
+ 0x96bd0275 0x9ce7c4f4 0xe74c3ecf 0x4d7ebf4a
+ 0xccb98c87 0x4087533d 0x4bc9d551 0x1dd9b49f
+ 0x470182f8 0xe5764366 0x5cbcbbf4 0xa6e3cd20
+ 0x0beefab1 0x71e29729 0x023e9dad 0xc2816f30
+ 0x8c17209c 0xdb579ef7 0xc2f38a82 0x81219d22
+ 0xa7eaac3a 0x51b5e632 0x8cd23cfa 0x1c14a751
+ 0x4e942e65 0xa8c73ba0 0xf949b6d7 0xe78fc2f1
+ 0x89974a85 0xed5eb057 0xdee39bb6 0xed8c0cab
+ 0x2a526c09 0xcfe60940 0x0d610c5e 0x484899ee
+ 0x92d4c509 0x3d822950 0x9cc21bfc 0x8635bf03
+ 0xaca9721d 0x654adb87 0x9642ee22 0x292d68fd
+ 0x55542325 0x511bb3dd 0x0db3d7c3 0x219cfd34
+ 0x70b944ee 0x9a96b3bf 0x7c7dbd32 0x47237e37
+ 0x93236405 0xc16867a0 0x71709059 0x6a602b3c
+ 0xe0c44204 0x21c010ac 0x1114b7b2 0x994094dc
+ 0x66e3fa66 0x6abb8afa 0x3dd1c246 0x1f35d1c9
+ 0xd6386abd 0x5a1e92ef 0x8214e792 0x1742727b
+ 0xea5724b8 0xd117876c 0x8aeae636 0xc339960b
+ 0xb491151d 0x1cdc17a3 0xe583b556 0x3927556b
+ 0x56b62c9e 0xda90add3 0x2c40a08f 0xb062928a
+ 0x31b7fb6e 0xa031f67e 0x9ac90564 0x09a4791e
+ 0x8675a98c 0x14d0da71 0x9c0e13a7 0xfad7410d
+ 0xdfeab9b3 0x8f798c75 0x2359e65a 0x666c074e
+ 0x79a559b9 0x297a6cfc 0x9b80d725 0x231980df
+ 0x5aba4182 0x6b8930ed 0xfad6b3bf 0x03b99393
+ 0x2ce7b19b 0xd12071f4 0x4c2d0204 0x54833fe9
+ 0x1c8d0433 0xb32e9724 0x02a273bf 0xc52a9d5a
+ 0x62aa1fa6 0x68ca34ad 0x1ac94c91 0x1794e58d
+ 0xa74691ef 0x0e22c1d3 0x66be923f 0x6f6f2c45
+ 0x15ce79a4 0x3b8c9c40 0xa11ff2f9 0xb18f0e8a
+ 0x1e0763e8 0xab472e97 0xd011b9c7 0x7f4cd77e
+ 0x60291b08 0xfc4746db 0x1101cb2f 0x7127e03e
+ 0x39dd8454 0x9e18e09b 0x449c71ba 0xc1106522
+ 0xee38c53b 0x8e30f2a1 0x30a5c398 0xbde9c623
+ 0x49ff1078 0x36360091 0x2b797c99 0x553ff25a
+ 0x063174e2 0xcd5fb064 0xbaf1c003 0xbbbba060
+ 0x9e7bd54a 0xe3bb944c 0xa7586ca4 0x4586a706
+ 0x5bd43e12 0x9139b258 0x5962b23e 0xb20799b8
+ 0x23ef9a21 0xb505a156 0xed51d1ae 0x82dced20
+ 0xfed14015 0xe50de153 0xcb1de201 0x20407156
+ 0x6e6c8c9f 0x4e33f0f7 0xb61006ea 0x81bcca2d
+ 0x8fd94695 0x576fe5c7 0x074ff2db 0xd707ccf4
+ 0x581503ca 0xfcc1c71b 0xcfc21805 0xcb8251a8
+ 0x69361b9a 0x14ec2bbe 0x2df3d3f6 0xa5e66081
+ 0xc5c70b23 0x5dfa028b 0x22338ffa 0x1932168a
+ 0x11a0ed71 0xf676d717 0x823b48d7 0xe02bc37e
+ 0xfc624cac 0x03795ade 0x845ff149 0x5b657ed4
+ 0xbe434a2e 0x8a77afde 0x3615b39d 0xba7200d9
+ 0x674e4541 0x12f91c65 0x694cb6ab 0x22e78146
+ 0x8f574161 0x58f35068 0xce5b6f43 0xd1f0f21e
+ 0x1be73d35 0x7b2dd03f 0x39bf4987 0xd9a00a8b
+ 0xa1285004 0x64b6871e 0xee7377af 0x51d239c8
+ 0x54521a4e 0xcb661f19 0xf26dc3a8 0x8772cda3
+ 0x2c827fa9 0x16f8f76f 0x1de27a89 0xf8b4a070
+ 0xab4243b4 0x2c910203 0x1fc663ad 0xe310c2a3
+ 0x9476000d 0x11e66913 0x346d42a8 0xa513fd81
+ 0xfc260d0f 0x54c7995a 0x228585bc 0xefc0dbb0
+ 0xb9999ca4 0x7dfc9ec2 0x1556bde4 0x2749b83f
+ 0x753da831 0x5d415b40 0x763debe4 0x94a2d4df
+ 0xcc560707 0x08a3de8d 0x7d9f0997 0xe3ff555e
+ 0xa8d05131 0xc75a1e9c 0xd696df91 0x633551a7
+ 0x7ead2980 0x6c8b10b9 0x2b97f758 0xa785048f
+ 0x744ba0dc 0xd350342d 0x6dbdccaa 0x10a5e224
+ 0x0963176d 0x71a4325c 0xa9bfeca5 0x73c90b16
+ 0x5f486277 0xc897525a 0x57a8234d 0x78a73eeb
+ 0x2640604e 0x1598efd9 0x135cb408 0x486bd6d3
+ 0xef98ab1b 0x0ce2744c 0x6a690e5d 0xa65e3af1
+ 0x5263f69d 0x10feb14e 0xd857d93a 0x94d52946
+ 0x52162f56 0xe72a0b7d 0x3e7d7b23 0xdff4b663
+ 0xcbad0105 0x4886da29 0x7d5521d0 0xa37ad7b6
+ 0xe4e79a68 0x4c6cc715 0xbb746a87 0x0a222aa2
+ 0xcff26451 0xe5b51d1a 0xd786658d 0x0edc8ddc
+ 0x95a91b59 0x2b7b0dd7 0xc4003ca8 0xa90e574b
+ 0xf6d1b6c5 0x0880fcaa 0xda31fd31 0x5e2c3099
+ 0x9e9cf801 0x069347b4 0x66215bcc 0x8698d9cc
+ 0x5d53b7ce 0x3b0a3025 0x1765a598 0xba1f4f29
+ 0xa6017b4a 0x1db6bb22 0xd9b63caf 0x531e2601
+ 0x24fa819b 0x8ab091a2 0xbbc3b96a 0x6d4e061d
+ 0x5f7b1d3a 0x13fc2925 0x564b9a06 0x2b0d7a90
+ 0x933a10c7 0x8aa5e38a 0x9b79b254 0x9444c3c2
+ 0xd737212d 0xb13f74df 0x7193f8c1 0xa95f42de
+ 0x6c5a39de 0xf1263eb0 0x57c322ea 0x829cf7e7
+ 0xf8c58a2e 0x2408ad3a 0xe05fa2b7 0xf61c2132
+ 0x47bcb102 0x167f4eb3 0x6a9ca49a 0x03c76439
+ 0x69fa64cc 0xd715eab1 0x26b9ff58 0x65a0d362
+ 0x168ed37e 0x1c4f3752 0xd4e7d4de 0x26e7865d
+ 0xfbd25786 0x347be5c6 0xb610ff32 0xdae6720f
+ 0xa01ff608 0x4a093466 0x7dce182b 0x5eb3cc1e
+ 0xadd542b4 0xfff308b2 0x9deaf2fb 0xd6fa9bac
+ 0x7f1729b9 0x54ae192c 0x85e8e337 0x840f4bfc
+ 0x566993d1 0x2cf2af63 0xf86cbf7b 0xa78e4aa1
+ 0x11806adc 0x06070f3d 0xa833c724 0x3ffef088
+ 0x78febf93 0x2cf6ae38 0x8c4d8867 0x485a2845
+ 0x003a5def 0xe8d1b155 0xcb675ca8 0xcf4fec75
+ 0xb7fe3198 0xf5da0890 0x9f1599b4 0xb952a34e
+ 0x7f1bc151 0x362e7bbb 0x063507a0 0x99c65de4
+ 0xd5130eb3 0x8613ee0b 0xfd6a8987 0x01c85a32
+ 0xed25a8ce 0x3e81114d 0x3f96d0be 0xfa892912
+ 0xb8ab3d94 0x7f10a909 0xe20ebd7e 0x30e900b7
+ 0x05b0d117 0x423ee599 0xd09dacd3 0xd385eb38
+ 0xa0839eee 0x4f29f80c 0x7f253d6e 0xbc757a72
+ 0x326c615c 0x43e0c8e2 0x21771593 0xa71e6072
+ 0xf355b109 0xf2852219 0x9a6ab7b6 0x9b1c39ad
+ 0x2edb942f 0x51234e78 0xbbe44b02 0x9078446a
+ 0x1ff97b31 0xb2967297 0x5f1267ac 0xf8ccd029
+ 0x846ccba2 0x3a2a8297 0xf60c1eae 0xd8b7a467
+ 0x517e2f1f 0xe0087865 0x2a952fa4 0x75963d8d
+ 0x1bb14788 0x1375edb3 0x941303f7 0x6738a9c9
+ 0xe3c99502 0x5f42b5ec 0xb53339d3 0x65896cac
+ 0x8d992623 0x8b09fdc1 0x47e71464 0xc09733fb
+ 0xfa8cfbfe 0x898ba57d 0xe74ca247 0x4fc21f9f
+ 0xc880e39a 0x973ab5b7 0x78628ad6 0x8a6fe2a0
+ 0x92a5a189 0x7a6ff475 0x7db81d10 0x81deea09
+ 0xa4ff44fd 0x056e383e 0x7cd47b4c 0x2182a401
+ 0xd0c4ce01 0xeb313665 0x8bbb4e07 0xbb4d4a64
+ 0x15fe41cb 0x53a267ce 0x8ee4ae7c 0x01678630
+ 0xda477daf 0x7ee74db4 0xf6e9228b 0x06c57aef
+ 0x5b9c8e80 0x1e05611b 0x26682707 0x7111591a
+ 0x7646cb3b 0x20f2d117 0x4dae44a9 0x395871da
+ 0x54e6172c 0x4ab90f71 0x65209536 0xb3b57c85
+ 0x11d10b0b 0xc9e50256 0x47521f5a 0x4416012f
+ 0x6d8042b6 0x454542fa 0x77f0fea3 0xce983a27
+ 0x40f74a4e 0xabc2d476 0xcd6a647d 0xca633336
+ 0xeb7fa467 0x4b14425f 0xd7abae15 0xb9652306
+ 0x990b3a98 0x03e6f53a 0xa5f3ec3c 0xb40c953f
+ 0x5cd8470a 0xbf93da01 0x89a52e28 0x5984bd42
+ 0xe9d93e95 0xa3b67bbf 0x099ff7cf 0x07b80086
+ 0x20cdf1cb 0xcfbbdb2e 0xeb0da53d 0x33b82f36
+ 0x28fb9aca 0x013bb5b7 0xcfbfefea 0x7f4400d1
+ 0xd3ad108f 0xe32556f3 0xa9e77e41 0x92955338
+ 0x3d102663 0x63bde93f 0xbbb464c4 0xcc1ff27f
+ 0x7968d83b 0xca32b52d 0x1d4102ff 0x84cfd695
+ 0x8303a6d3 0xc6f8ba69 0xdd78d4ef 0x98b195af
+ 0x50f92a15 0x2066c503 0x61281597 0x5d0197b7
+ 0x59e6f0be 0x02423dd6 0x9b4d27af 0xb2a0755d
+ 0x72f2eb4e 0xdb5aa819 0xddb42e82 0x9688712a
+ 0xb430e384 0x6484e439 0x44f68d17 0x195c6382
+ 0xddee2db1 0xd9af2e18 0x7fbd30d6 0x2ac223db
+ 0x0d3bd809 0xec982530 0x1a41d13f 0xef2849a8
+ 0x9c233021 0xc074a29c 0xe7b8f28f 0xd0adf47f
+ 0x23cdf70d 0x6795e85d 0x1168d6ea 0x3c8bb4c7
+ 0xad1d00c9 0xf3eeb5d0 0x2f950982 0x9fbbde57
+ 0xdc733a93 0xb23e2beb 0x7dbb34af 0xf1323cff
+ 0xf6c9a9bc 0xf69900a6 0x9447ab0b 0xf03e55fa
+ 0x2816479b 0x487e507e 0x494087fb 0x0601d1ef
+ 0x27c86510 0x6a14691a 0xb78886de 0xe89e8c84
+ 0xf2cd073c 0x09144b70 0xa82227a5 0x82f88828
+ 0x71f7e10a 0x6c2b46b6 0xf813fe7d 0xf76d2602
+ 0x044d5543 0x9e1b6a76 0x967ad7b5 0xe803b0a7
+ 0x01e03dd9 0x6d5c94d8 0x112357c8 0x8e0bfe12
+ 0xcc8c7461 0xfbc1c562 0x9838886c 0xa16c46a7
+ 0x020631ad 0x70fb29ff 0x5f5f1795 0x07a762e8
+ 0x3467aa2b 0xd396d1d7 0xa12aaf4c 0xd3c13b6b
+ 0xf158d7dd 0x17b1317a 0xd847a91d 0x7612ab8e
+ >;
diff --git a/arch/x86/dts/qemu-x86_i440fx.dts b/arch/x86/dts/qemu-x86_i440fx.dts
index 8a06229..9086b46 100644
--- a/arch/x86/dts/qemu-x86_i440fx.dts
+++ b/arch/x86/dts/qemu-x86_i440fx.dts
@@ -32,17 +32,10 @@
cpu@0 {
device_type = "cpu";
- compatible = "cpu-x86";
+ compatible = "cpu-qemu";
reg = <0>;
intel,apic-id = <0>;
};
-
- cpu@1 {
- device_type = "cpu";
- compatible = "cpu-x86";
- reg = <1>;
- intel,apic-id = <1>;
- };
};
tsc-timer {
diff --git a/arch/x86/dts/qemu-x86_q35.dts b/arch/x86/dts/qemu-x86_q35.dts
index 0b685c8..145e811 100644
--- a/arch/x86/dts/qemu-x86_q35.dts
+++ b/arch/x86/dts/qemu-x86_q35.dts
@@ -43,17 +43,10 @@
cpu@0 {
device_type = "cpu";
- compatible = "cpu-x86";
+ compatible = "cpu-qemu";
reg = <0>;
intel,apic-id = <0>;
};
-
- cpu@1 {
- device_type = "cpu";
- compatible = "cpu-x86";
- reg = <1>;
- intel,apic-id = <1>;
- };
};
tsc-timer {
diff --git a/arch/x86/include/asm/arch-baytrail/fsp/fsp_configs.h b/arch/x86/include/asm/arch-baytrail/fsp/fsp_configs.h
new file mode 100644
index 0000000..e539890
--- /dev/null
+++ b/arch/x86/include/asm/arch-baytrail/fsp/fsp_configs.h
@@ -0,0 +1,19 @@
+/*
+ * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
+ *
+ * SPDX-License-Identifier: Intel
+ */
+
+#ifndef __FSP_CONFIGS_H__
+#define __FSP_CONFIGS_H__
+
+struct fsp_config_data {
+ struct fsp_cfg_common common;
+ struct upd_region fsp_upd;
+};
+
+struct fspinit_rtbuf {
+ struct common_buf common; /* FSP common runtime data structure */
+};
+
+#endif /* __FSP_CONFIGS_H__ */
diff --git a/arch/x86/include/asm/arch-ivybridge/pch.h b/arch/x86/include/asm/arch-ivybridge/pch.h
index 21df083..31437c8 100644
--- a/arch/x86/include/asm/arch-ivybridge/pch.h
+++ b/arch/x86/include/asm/arch-ivybridge/pch.h
@@ -105,6 +105,8 @@ void pch_iobp_update(u32 address, u32 andvalue, u32 orvalue);
#define GPIO_ROUT 0xb8
#define LPC_IO_DEC 0x80 /* IO Decode Ranges Register */
+#define COMB_DEC_RANGE (1 << 4) /* 0x2f8-0x2ff (COM2) */
+#define COMA_DEC_RANGE (0 << 0) /* 0x3f8-0x3ff (COM1) */
#define LPC_EN 0x82 /* LPC IF Enables Register */
#define CNF2_LPC_EN (1 << 13) /* 0x4e/0x4f */
#define CNF1_LPC_EN (1 << 12) /* 0x2e/0x2f */
@@ -121,6 +123,14 @@ void pch_iobp_update(u32 address, u32 andvalue, u32 orvalue);
#define LPC_GEN3_DEC 0x8c /* LPC IF Generic Decode Range 3 */
#define LPC_GEN4_DEC 0x90 /* LPC IF Generic Decode Range 4 */
#define LPC_GENX_DEC(x) (0x84 + 4 * (x))
+#define GEN_DEC_RANGE_256B 0xfc0000 /* 256 Bytes */
+#define GEN_DEC_RANGE_128B 0x7c0000 /* 128 Bytes */
+#define GEN_DEC_RANGE_64B 0x3c0000 /* 64 Bytes */
+#define GEN_DEC_RANGE_32B 0x1c0000 /* 32 Bytes */
+#define GEN_DEC_RANGE_16B 0x0c0000 /* 16 Bytes */
+#define GEN_DEC_RANGE_8B 0x040000 /* 8 Bytes */
+#define GEN_DEC_RANGE_4B 0x000000 /* 4 Bytes */
+#define GEN_DEC_RANGE_EN (1 << 0) /* Range Enable */
/* PCI Configuration Space (D31:F1): IDE */
#define PCH_IDE_DEV PCI_BDF(0, 0x1f, 1)
diff --git a/arch/x86/include/asm/arch-queensbay/fsp/fsp_configs.h b/arch/x86/include/asm/arch-queensbay/fsp/fsp_configs.h
new file mode 100644
index 0000000..e539890
--- /dev/null
+++ b/arch/x86/include/asm/arch-queensbay/fsp/fsp_configs.h
@@ -0,0 +1,19 @@
+/*
+ * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
+ *
+ * SPDX-License-Identifier: Intel
+ */
+
+#ifndef __FSP_CONFIGS_H__
+#define __FSP_CONFIGS_H__
+
+struct fsp_config_data {
+ struct fsp_cfg_common common;
+ struct upd_region fsp_upd;
+};
+
+struct fspinit_rtbuf {
+ struct common_buf common; /* FSP common runtime data structure */
+};
+
+#endif /* __FSP_CONFIGS_H__ */
diff --git a/arch/x86/include/asm/fsp/fsp_api.h b/arch/x86/include/asm/fsp/fsp_api.h
index 2d34d13..afafb30 100644
--- a/arch/x86/include/asm/fsp/fsp_api.h
+++ b/arch/x86/include/asm/fsp/fsp_api.h
@@ -11,6 +11,16 @@
#include <linux/linkage.h>
/*
+ * FSP common configuration structure.
+ * This needs to be included in the platform-specific struct fsp_config_data.
+ */
+struct fsp_cfg_common {
+ struct fsp_header *fsp_hdr;
+ u32 stack_top;
+ u32 boot_mode;
+};
+
+/*
* FspInit continuation function prototype.
* Control will be returned to this callback function after FspInit API call.
*/
@@ -30,7 +40,7 @@ struct common_buf {
* Stack top pointer used by the bootloader. The new stack frame will be
* set up at this location after FspInit API call.
*/
- u32 *stack_top;
+ u32 stack_top;
u32 boot_mode; /* Current system boot mode */
void *upd_data; /* User platform configuraiton data region */
u32 reserved[7]; /* Reserved */
diff --git a/arch/x86/include/asm/fsp/fsp_platform.h b/arch/x86/include/asm/fsp/fsp_platform.h
deleted file mode 100644
index 61286ce..0000000
--- a/arch/x86/include/asm/fsp/fsp_platform.h
+++ /dev/null
@@ -1,15 +0,0 @@
-/*
- * Copyright (C) 2013, Intel Corporation
- * Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com>
- *
- * SPDX-License-Identifier: Intel
- */
-
-#ifndef __FSP_PLATFORM_H__
-#define __FSP_PLATFORM_H__
-
-struct fspinit_rtbuf {
- struct common_buf common; /* FSP common runtime data structure */
-};
-
-#endif
diff --git a/arch/x86/include/asm/fsp/fsp_support.h b/arch/x86/include/asm/fsp/fsp_support.h
index 7317dda..61d811f 100644
--- a/arch/x86/include/asm/fsp/fsp_support.h
+++ b/arch/x86/include/asm/fsp/fsp_support.h
@@ -13,16 +13,10 @@
#include "fsp_ffs.h"
#include "fsp_api.h"
#include "fsp_hob.h"
-#include "fsp_platform.h"
#include "fsp_infoheader.h"
#include "fsp_bootmode.h"
#include <asm/arch/fsp/fsp_vpd.h>
-
-struct shared_data {
- struct fsp_header *fsp_hdr;
- u32 *stack_top;
- struct upd_region fsp_upd;
-};
+#include <asm/arch/fsp/fsp_configs.h>
#define FSP_LOWMEM_BASE 0x100000UL
#define FSP_HIGHMEM_BASE 0x100000000ULL
@@ -49,14 +43,12 @@ void fsp_init_done(void *hob_list);
/**
* FSP Continuation function
*
- * @shared_data: Shared data base before stack migration
* @status: Always 0
* @hob_list: HOB list pointer
*
* @retval: Never returns
*/
-void fsp_continue(struct shared_data *shared_data, u32 status,
- void *hob_list);
+void fsp_continue(u32 status, void *hob_list);
/**
* Find FSP header offset in FSP image
@@ -199,13 +191,15 @@ void *fsp_get_nvs_data(const void *hob_list, u32 *len);
void *fsp_get_bootloader_tmp_mem(const void *hob_list, u32 *len);
/**
- * This function overrides the default configurations in the UPD data region.
+ * This function overrides the default configurations of FSP.
*
- * @fsp_upd: A pointer to the upd_region data strcture
+ * @config: A pointer to the FSP configuration data structure
+ * @rt_buf: A pointer to the FSP runtime buffer data structure
*
* @return: None
*/
-void update_fsp_upd(struct upd_region *fsp_upd);
+void update_fsp_configs(struct fsp_config_data *config,
+ struct fspinit_rtbuf *rt_buf);
/**
* fsp_init_phase_pci() - Tell the FSP that we have completed PCI init
diff --git a/arch/x86/include/asm/fw_cfg.h b/arch/x86/include/asm/fw_cfg.h
new file mode 100644
index 0000000..fb110fa
--- /dev/null
+++ b/arch/x86/include/asm/fw_cfg.h
@@ -0,0 +1,93 @@
+/*
+ * (C) Copyright 2015 Miao Yan <yanmiaobest@gmail.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef __FW_CFG__
+#define __FW_CFG__
+
+#define FW_CONTROL_PORT 0x510
+#define FW_DATA_PORT 0x511
+#define FW_DMA_PORT_LOW 0x514
+#define FW_DMA_PORT_HIGH 0x518
+
+enum qemu_fwcfg_items {
+ FW_CFG_SIGNATURE = 0x00,
+ FW_CFG_ID = 0x01,
+ FW_CFG_UUID = 0x02,
+ FW_CFG_RAM_SIZE = 0x03,
+ FW_CFG_NOGRAPHIC = 0x04,
+ FW_CFG_NB_CPUS = 0x05,
+ FW_CFG_MACHINE_ID = 0x06,
+ FW_CFG_KERNEL_ADDR = 0x07,
+ FW_CFG_KERNEL_SIZE = 0x08,
+ FW_CFG_KERNEL_CMDLINE = 0x09,
+ FW_CFG_INITRD_ADDR = 0x0a,
+ FW_CFG_INITRD_SIZE = 0x0b,
+ FW_CFG_BOOT_DEVICE = 0x0c,
+ FW_CFG_NUMA = 0x0d,
+ FW_CFG_BOOT_MENU = 0x0e,
+ FW_CFG_MAX_CPUS = 0x0f,
+ FW_CFG_KERNEL_ENTRY = 0x10,
+ FW_CFG_KERNEL_DATA = 0x11,
+ FW_CFG_INITRD_DATA = 0x12,
+ FW_CFG_CMDLINE_ADDR = 0x13,
+ FW_CFG_CMDLINE_SIZE = 0x14,
+ FW_CFG_CMDLINE_DATA = 0x15,
+ FW_CFG_SETUP_ADDR = 0x16,
+ FW_CFG_SETUP_SIZE = 0x17,
+ FW_CFG_SETUP_DATA = 0x18,
+ FW_CFG_FILE_DIR = 0x19,
+ FW_CFG_FILE_FIRST = 0x20,
+ FW_CFG_WRITE_CHANNEL = 0x4000,
+ FW_CFG_ARCH_LOCAL = 0x8000,
+ FW_CFG_INVALID = 0xffff,
+};
+
+#define FW_CFG_FILE_SLOTS 0x10
+#define FW_CFG_MAX_ENTRY (FW_CFG_FILE_FIRST + FW_CFG_FILE_SLOTS)
+#define FW_CFG_ENTRY_MASK ~(FW_CFG_WRITE_CHANNEL | FW_CFG_ARCH_LOCAL)
+
+#define FW_CFG_MAX_FILE_PATH 56
+
+#define QEMU_FW_CFG_SIGNATURE (('Q' << 24) | ('E' << 16) | ('M' << 8) | 'U')
+
+#define FW_CFG_DMA_ERROR (1 << 0)
+#define FW_CFG_DMA_READ (1 << 1)
+#define FW_CFG_DMA_SKIP (1 << 2)
+#define FW_CFG_DMA_SELECT (1 << 3)
+
+#define FW_CFG_DMA_ENABLED (1 << 1)
+
+struct fw_cfg_file {
+ __be32 size;
+ __be16 select;
+ __be16 reserved;
+ char name[FW_CFG_MAX_FILE_PATH];
+};
+
+struct fw_cfg_files {
+ __be32 count;
+ struct fw_cfg_file files[];
+};
+
+struct fw_cfg_dma_access {
+ __be32 control;
+ __be32 length;
+ __be64 address;
+};
+
+/**
+ * Initialize QEMU fw_cfg interface
+ */
+void qemu_fwcfg_init(void);
+
+/**
+ * Get system cpu number
+ *
+ * @return: cpu number in system
+ */
+int qemu_fwcfg_online_cpus(void);
+
+#endif
diff --git a/arch/x86/lib/fsp/cmd_fsp.c b/arch/x86/lib/fsp/cmd_fsp.c
index 4959edf..2554663 100644
--- a/arch/x86/lib/fsp/cmd_fsp.c
+++ b/arch/x86/lib/fsp/cmd_fsp.c
@@ -69,7 +69,7 @@ static int do_hob(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
printf("---|----------|-----------|------|-");
printf("------------------------------------------\n");
while (!end_of_hob(hdr)) {
- printf("%-2d | %08x | ", i, (unsigned int)hdr);
+ printf("%02x | %08x | ", i, (unsigned int)hdr);
type = hdr->type;
if (type == HOB_TYPE_UNUSED)
desc = "*Unused*";
@@ -79,7 +79,7 @@ static int do_hob(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
desc = hob_type[type];
else
desc = "*Invalid*";
- printf("%-9s | %-4d | ", desc, hdr->len);
+ printf("%-9s | %04x | ", desc, hdr->len);
if (type == HOB_TYPE_MEM_ALLOC || type == HOB_TYPE_RES_DESC ||
type == HOB_TYPE_GUID_EXT) {
diff --git a/arch/x86/lib/fsp/fsp_support.c b/arch/x86/lib/fsp/fsp_support.c
index 1d48ff4..875c96a 100644
--- a/arch/x86/lib/fsp/fsp_support.c
+++ b/arch/x86/lib/fsp/fsp_support.c
@@ -87,42 +87,28 @@ struct fsp_header *__attribute__((optimize("O0"))) find_fsp_header(void)
return (struct fsp_header *)fsp;
}
-void fsp_continue(struct shared_data *shared_data, u32 status, void *hob_list)
+void fsp_continue(u32 status, void *hob_list)
{
- u32 stack_len;
- u32 stack_base;
- u32 stack_top;
-
post_code(POST_MRC);
assert(status == 0);
- /* Get the migrated stack in normal memory */
- stack_base = (u32)fsp_get_bootloader_tmp_mem(hob_list, &stack_len);
- assert(stack_base != 0);
- stack_top = stack_base + stack_len - sizeof(u32);
-
- /*
- * Old stack base is stored at the very end of the stack top,
- * use it to calculate the migrated shared data base
- */
- shared_data = (struct shared_data *)(stack_base +
- ((u32)shared_data - *(u32 *)stack_top));
-
/* The boot loader main function entry */
fsp_init_done(hob_list);
}
void fsp_init(u32 stack_top, u32 boot_mode, void *nvs_buf)
{
- struct shared_data shared_data;
+ struct fsp_config_data config_data;
fsp_init_f init;
struct fsp_init_params params;
struct fspinit_rtbuf rt_buf;
- struct vpd_region *fsp_vpd;
struct fsp_header *fsp_hdr;
struct fsp_init_params *params_ptr;
+#ifdef CONFIG_FSP_USE_UPD
+ struct vpd_region *fsp_vpd;
struct upd_region *fsp_upd;
+#endif
#ifdef CONFIG_DEBUG_UART
setup_early_uart();
@@ -134,14 +120,11 @@ void fsp_init(u32 stack_top, u32 boot_mode, void *nvs_buf)
panic("Invalid FSP header");
}
- fsp_upd = &shared_data.fsp_upd;
- memset(&rt_buf, 0, sizeof(struct fspinit_rtbuf));
-
- /* Reserve a gap in stack top */
- rt_buf.common.stack_top = (u32 *)stack_top - 32;
- rt_buf.common.boot_mode = boot_mode;
- rt_buf.common.upd_data = fsp_upd;
+ config_data.common.fsp_hdr = fsp_hdr;
+ config_data.common.stack_top = stack_top;
+ config_data.common.boot_mode = boot_mode;
+#ifdef CONFIG_FSP_USE_UPD
/* Get VPD region start */
fsp_vpd = (struct vpd_region *)(fsp_hdr->img_base +
fsp_hdr->cfg_region_off);
@@ -149,15 +132,20 @@ void fsp_init(u32 stack_top, u32 boot_mode, void *nvs_buf)
/* Verify the VPD data region is valid */
assert(fsp_vpd->sign == VPD_IMAGE_ID);
+ fsp_upd = &config_data.fsp_upd;
+
/* Copy default data from Flash */
memcpy(fsp_upd, (void *)(fsp_hdr->img_base + fsp_vpd->upd_offset),
sizeof(struct upd_region));
/* Verify the UPD data region is valid */
assert(fsp_upd->terminator == UPD_TERMINATOR);
+#endif
- /* Override any UPD setting if required */
- update_fsp_upd(fsp_upd);
+ memset(&rt_buf, 0, sizeof(struct fspinit_rtbuf));
+
+ /* Override any configuration if required */
+ update_fsp_configs(&config_data, &rt_buf);
memset(&params, 0, sizeof(struct fsp_init_params));
params.nvs_buf = nvs_buf;
@@ -167,28 +155,24 @@ void fsp_init(u32 stack_top, u32 boot_mode, void *nvs_buf)
init = (fsp_init_f)(fsp_hdr->img_base + fsp_hdr->fsp_init);
params_ptr = &params;
- shared_data.fsp_hdr = fsp_hdr;
- shared_data.stack_top = (u32 *)stack_top;
-
post_code(POST_PRE_MRC);
/* Load GDT for FSP */
setup_fsp_gdt();
/*
- * Use ASM code to ensure the register value in EAX & ECX
- * will be passed into BlContinuationFunc
+ * Use ASM code to ensure the register value in EAX & EDX
+ * will be passed into fsp_continue
*/
asm volatile (
"pushl %0;"
"call *%%eax;"
".global asm_continuation;"
"asm_continuation:;"
- "movl %%ebx, %%eax;" /* shared_data */
- "movl 4(%%esp), %%edx;" /* status */
- "movl 8(%%esp), %%ecx;" /* hob_list */
+ "movl 4(%%esp), %%eax;" /* status */
+ "movl 8(%%esp), %%edx;" /* hob_list */
"jmp fsp_continue;"
- : : "m"(params_ptr), "a"(init), "b"(&shared_data)
+ : : "m"(params_ptr), "a"(init)
);
/*
diff --git a/board/google/chromebook_link/Kconfig b/board/google/chromebook_link/Kconfig
index 6b13939..fa12f33 100644
--- a/board/google/chromebook_link/Kconfig
+++ b/board/google/chromebook_link/Kconfig
@@ -19,6 +19,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
def_bool y
select X86_RESET_VECTOR
select NORTHBRIDGE_INTEL_IVYBRIDGE
+ select HAVE_INTEL_ME
select BOARD_ROMSIZE_KB_8192
config PCIE_ECAM_BASE
diff --git a/board/google/chromebox_panther/Kconfig b/board/google/chromebox_panther/Kconfig
index ae96d23..2af3aa9 100644
--- a/board/google/chromebox_panther/Kconfig
+++ b/board/google/chromebox_panther/Kconfig
@@ -20,6 +20,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
def_bool y
select X86_RESET_VECTOR
select NORTHBRIDGE_INTEL_IVYBRIDGE
+ select HAVE_INTEL_ME
select BOARD_ROMSIZE_KB_8192
config SYS_CAR_ADDR
diff --git a/doc/README.x86 b/doc/README.x86
index 1271e5e..36aaef0 100644
--- a/doc/README.x86
+++ b/doc/README.x86
@@ -295,9 +295,37 @@ show QEMU's VGA console window. Note this will disable QEMU's serial output.
If you want to check both consoles, use '-serial stdio'.
Multicore is also supported by QEMU via '-smp n' where n is the number of cores
-to instantiate. Currently the default U-Boot built for QEMU supports 2 cores.
-In order to support more cores, you need add additional cpu nodes in the device
-tree and change CONFIG_MAX_CPUS accordingly.
+to instantiate. Note, the maximum supported CPU number in QEMU is 255.
+
+The fw_cfg interface in QEMU also provides information about kernel data, initrd,
+command-line arguments and more. U-Boot supports directly accessing these informtion
+from fw_cfg interface, this saves the time of loading them from hard disk or
+network again, through emulated devices. To use it , simply providing them in
+QEMU command line:
+
+$ qemu-system-i386 -nographic -bios path/to/u-boot.rom -m 1024 -kernel /path/to/bzImage
+ -append 'root=/dev/ram console=ttyS0' -initrd /path/to/initrd -smp 8
+
+Note: -initrd and -smp are both optional
+
+Then start QEMU, in U-Boot command line use the following U-Boot command to setup kernel:
+
+ => qfw
+qfw - QEMU firmware interface
+
+Usage:
+qfw <command>
+ - list : print firmware(s) currently loaded
+ - cpus : print online cpu number
+ - load <kernel addr> <initrd addr> : load kernel and initrd (if any) and setup for zboot
+
+=> qfw load
+loading kernel to address 01000000 size 5d9d30 initrd 04000000 size 1b1ab50
+
+Here the kernel (bzImage) is loaded to 01000000 and initrd is to 04000000. Then, 'zboot'
+can be used to boot the kernel:
+
+=> zboot 02000000 - 04000000 1b1ab50
CPU Microcode
-------------
diff --git a/include/configs/x86-common.h b/include/configs/x86-common.h
index 70ec103..4182a3b 100644
--- a/include/configs/x86-common.h
+++ b/include/configs/x86-common.h
@@ -208,6 +208,7 @@
#define CONFIG_HOSTNAME x86
#define CONFIG_BOOTFILE "bzImage"
#define CONFIG_LOADADDR 0x1000000
+#define CONFIG_RAMDISK_ADDR 0x4000000
#define CONFIG_EXTRA_ENV_SETTINGS \
CONFIG_STD_DEVICES_SETTINGS \
@@ -215,7 +216,7 @@
"netdev=eth0\0" \
"consoledev=ttyS0\0" \
"othbootargs=acpi=off\0" \
- "ramdiskaddr=0x2000000\0" \
+ "ramdiskaddr=0x4000000\0" \
"ramdiskfile=initramfs.gz\0"
#define CONFIG_RAMBOOTCOMMAND \
diff --git a/include/fdtdec.h b/include/fdtdec.h
index 7a1450c..27b350e 100644
--- a/include/fdtdec.h
+++ b/include/fdtdec.h
@@ -170,6 +170,7 @@ enum fdt_compat_id {
COMPAT_ALTERA_SOCFPGA_DWC2USB, /* SoCFPGA DWC2 USB controller */
COMPAT_INTEL_BAYTRAIL_FSP, /* Intel Bay Trail FSP */
COMPAT_INTEL_BAYTRAIL_FSP_MDP, /* Intel FSP memory-down params */
+ COMPAT_INTEL_IVYBRIDGE_FSP, /* Intel Ivy Bridge FSP */
COMPAT_COUNT,
};
diff --git a/lib/fdtdec.c b/lib/fdtdec.c
index 1093c30..b50d105 100644
--- a/lib/fdtdec.c
+++ b/lib/fdtdec.c
@@ -75,6 +75,7 @@ static const char * const compat_names[COMPAT_COUNT] = {
COMPAT(ALTERA_SOCFPGA_DWC2USB, "snps,dwc2"),
COMPAT(COMPAT_INTEL_BAYTRAIL_FSP, "intel,baytrail-fsp"),
COMPAT(COMPAT_INTEL_BAYTRAIL_FSP_MDP, "intel,baytrail-fsp-mdp"),
+ COMPAT(COMPAT_INTEL_IVYBRIDGE_FSP, "intel,ivybridge-fsp"),
};
const char *fdtdec_get_compatible(enum fdt_compat_id id)
diff --git a/tools/microcode-tool.py b/tools/microcode-tool.py
index 71c2e91..790c27e 100755
--- a/tools/microcode-tool.py
+++ b/tools/microcode-tool.py
@@ -95,9 +95,23 @@ def ParseHeaderFiles(fname_list):
name = os.path.splitext(name)[0]
data = []
with open(fname) as fd:
+ license_start = False
+ license_end = False
for line in fd:
line = line.rstrip()
+ if len(line) >= 2:
+ if line[0] == '/' and line[1] == '*':
+ license_start = True
+ continue
+ if line[0] == '*' and line[1] == '/':
+ license_end = True
+ continue
+ if license_start and not license_end:
+ # Ignore blank line
+ if len(line) > 0:
+ license_text.append(line)
+ continue
# Omit anything after the last comma
words = line.split(',')[:-1]
data += [word + ',' for word in words]