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authorChunhe Lan <Chunhe.Lan@freescale.com>2014-12-10 20:00:39 +0800
committerYork Sun <yorksun@freescale.com>2015-01-16 09:29:59 -0800
commit3bcf047da838d2462750cd55bba6db7d71b6c06a (patch)
tree08cc10b1c0a427301329abf46bb914f27e94e664
parentd67be7c965949b88e2bae40ebb9de263a4f441e0 (diff)
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powerpc/t4240rdb: Add alternate SerDes 2 protocol to align with RCW
SerDes 2 protocol 56 is not valid any longer due to the new RCW; protocol 55 is used instead, so add SerDes 2 protocol 55 to align with RCW. Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
-rw-r--r--board/freescale/t4rdb/eth.c2
-rw-r--r--board/freescale/t4rdb/t4_rcw.cfg4
2 files changed, 3 insertions, 3 deletions
diff --git a/board/freescale/t4rdb/eth.c b/board/freescale/t4rdb/eth.c
index 142c6a8..879bd1a 100644
--- a/board/freescale/t4rdb/eth.c
+++ b/board/freescale/t4rdb/eth.c
@@ -101,7 +101,7 @@ int board_eth_init(bd_t *bis)
}
#if (CONFIG_SYS_NUM_FMAN == 2)
- if (srds_prtcl_s2 == 56) {
+ if ((srds_prtcl_s2 == 56) || (srds_prtcl_s2 == 55)) {
/* SGMII && XFI */
fm_info_set_phy_address(FM2_DTSEC1, SGMII_PHY_ADDR5);
fm_info_set_phy_address(FM2_DTSEC2, SGMII_PHY_ADDR6);
diff --git a/board/freescale/t4rdb/t4_rcw.cfg b/board/freescale/t4rdb/t4_rcw.cfg
index fdbbe5e..e46c7b2 100644
--- a/board/freescale/t4rdb/t4_rcw.cfg
+++ b/board/freescale/t4rdb/t4_rcw.cfg
@@ -1,7 +1,7 @@
#PBL preamble and RCW header
aa55aa55 010e0100
-#serdes protocol 27_56_1_9
+#serdes protocol 27_55_1_9
16070019 18101916 00000000 00000000
-6c700848 00448c00 6c020000 f5000000
+6c6e0848 00448c00 6c020000 f5000000
00000000 ee0000ee 00000000 000287fc
00000000 50000000 00000000 00000028