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authorSimon Glass <sjg@chromium.org>2016-07-05 17:10:15 -0600
committerSimon Glass <sjg@chromium.org>2016-07-27 14:15:54 -0600
commit329a449f2c289b4de8f892fca1d9379ce5fd81b8 (patch)
tree8956954f49c85152a375b0d0b7f2b156b3929afe
parentdec49e862ef9e74654fad3595fda5be99d33711a (diff)
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dm: mmc: zynq: Convert zynq to use driver model for MMC
Move zynq to the latest driver model support by enabling CONFIG_DM_MMC, CONFIG_DM_MMC_OPS and CONFIG_BLK. Signed-off-by: Simon Glass <sjg@chromium.org>
-rw-r--r--arch/arm/Kconfig5
-rw-r--r--drivers/mmc/zynq_sdhci.c39
2 files changed, 39 insertions, 5 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 9a7ebed..6de734f 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -657,11 +657,13 @@ config ARCH_ZYNQ
select DM_GPIO
select SPL_DM if SPL
select DM_MMC
+ select DM_MMC_OPS
select DM_SPI
select DM_SERIAL
select DM_SPI_FLASH
select SPL_SEPARATE_BSS if SPL
select DM_USB if USB
+ select BLK
config ARCH_ZYNQMP
bool "Support Xilinx ZynqMP Platform"
@@ -673,6 +675,9 @@ config ARCH_ZYNQMP
select CLK
select SPL_CLK
select DM_USB if USB
+ select DM_MMC
+ select DM_MMC_OPS
+ select BLK
config TEGRA
bool "NVIDIA Tegra"
diff --git a/drivers/mmc/zynq_sdhci.c b/drivers/mmc/zynq_sdhci.c
index d405929..bcd154a 100644
--- a/drivers/mmc/zynq_sdhci.c
+++ b/drivers/mmc/zynq_sdhci.c
@@ -17,10 +17,18 @@
# define CONFIG_ZYNQ_SDHCI_MIN_FREQ 0
#endif
+struct arasan_sdhci_plat {
+ struct mmc_config cfg;
+ struct mmc mmc;
+};
+
static int arasan_sdhci_probe(struct udevice *dev)
{
+ struct arasan_sdhci_plat *plat = dev_get_platdata(dev);
struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
struct sdhci_host *host = dev_get_priv(dev);
+ u32 caps;
+ int ret;
host->quirks = SDHCI_QUIRK_WAIT_SEND_CMD |
SDHCI_QUIRK_BROKEN_R1B;
@@ -31,13 +39,19 @@ static int arasan_sdhci_probe(struct udevice *dev)
host->version = sdhci_readw(host, SDHCI_HOST_VERSION);
- add_sdhci(host, CONFIG_ZYNQ_SDHCI_MAX_FREQ,
- CONFIG_ZYNQ_SDHCI_MIN_FREQ);
-
- upriv->mmc = host->mmc;
+ caps = sdhci_readl(host, SDHCI_CAPABILITIES);
+ ret = sdhci_setup_cfg(&plat->cfg, dev->name, host->bus_width,
+ caps, CONFIG_ZYNQ_SDHCI_MAX_FREQ,
+ CONFIG_ZYNQ_SDHCI_MIN_FREQ, host->version,
+ host->quirks, 0);
+ host->mmc = &plat->mmc;
+ if (ret)
+ return ret;
+ host->mmc->priv = host;
host->mmc->dev = dev;
+ upriv->mmc = host->mmc;
- return 0;
+ return sdhci_probe(dev);
}
static int arasan_sdhci_ofdata_to_platdata(struct udevice *dev)
@@ -50,6 +64,18 @@ static int arasan_sdhci_ofdata_to_platdata(struct udevice *dev)
return 0;
}
+static int arasan_sdhci_bind(struct udevice *dev)
+{
+ struct arasan_sdhci_plat *plat = dev_get_platdata(dev);
+ int ret;
+
+ ret = sdhci_bind(dev, &plat->mmc, &plat->cfg);
+ if (ret)
+ return ret;
+
+ return 0;
+}
+
static const struct udevice_id arasan_sdhci_ids[] = {
{ .compatible = "arasan,sdhci-8.9a" },
{ }
@@ -60,6 +86,9 @@ U_BOOT_DRIVER(arasan_sdhci_drv) = {
.id = UCLASS_MMC,
.of_match = arasan_sdhci_ids,
.ofdata_to_platdata = arasan_sdhci_ofdata_to_platdata,
+ .ops = &sdhci_ops,
+ .bind = arasan_sdhci_bind,
.probe = arasan_sdhci_probe,
.priv_auto_alloc_size = sizeof(struct sdhci_host),
+ .platdata_auto_alloc_size = sizeof(struct arasan_sdhci_plat),
};