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author | Michal Simek <michal.simek@xilinx.com> | 2016-05-17 13:33:11 +0200 |
---|---|---|
committer | Michal Simek <michal.simek@xilinx.com> | 2016-05-24 11:15:01 +0200 |
commit | 293271cbc3080a3d23afe48adafbfba271cd6761 (patch) | |
tree | e882878ccaeae856f599bfee73b88ee3b0fcea67 | |
parent | e6a9ed04e78cf87ec97e306fa4e7a1669ef98df6 (diff) | |
download | u-boot-imx-293271cbc3080a3d23afe48adafbfba271cd6761.zip u-boot-imx-293271cbc3080a3d23afe48adafbfba271cd6761.tar.gz u-boot-imx-293271cbc3080a3d23afe48adafbfba271cd6761.tar.bz2 |
ARM64: zynqmp: Enable CLK framework
ZynqMP is using fixed clocks now that's why enabling it to be available
for drivers.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
-rw-r--r-- | configs/xilinx_zynqmp_ep_defconfig | 2 | ||||
-rw-r--r-- | configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig | 2 | ||||
-rw-r--r-- | configs/xilinx_zynqmp_zc1751_xm016_dc2_defconfig | 2 | ||||
-rw-r--r-- | configs/xilinx_zynqmp_zc1751_xm019_dc5_defconfig | 2 | ||||
-rw-r--r-- | configs/xilinx_zynqmp_zcu102_defconfig | 2 | ||||
-rw-r--r-- | configs/xilinx_zynqmp_zcu102_revB_defconfig | 2 |
6 files changed, 12 insertions, 0 deletions
diff --git a/configs/xilinx_zynqmp_ep_defconfig b/configs/xilinx_zynqmp_ep_defconfig index 903dc48..37b8052 100644 --- a/configs/xilinx_zynqmp_ep_defconfig +++ b/configs/xilinx_zynqmp_ep_defconfig @@ -40,6 +40,8 @@ CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_OF_EMBED=y CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_CLK=y +CONFIG_SPL_CLK=y CONFIG_SYS_I2C_CADENCE=y CONFIG_DM_MMC=y CONFIG_ZYNQ_SDHCI=y diff --git a/configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig b/configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig index 77a508e..fa761e5 100644 --- a/configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig +++ b/configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig @@ -31,6 +31,8 @@ CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_OF_EMBED=y CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_CLK=y +CONFIG_SPL_CLK=y CONFIG_SYS_I2C_CADENCE=y CONFIG_DM_MMC=y CONFIG_ZYNQ_SDHCI=y diff --git a/configs/xilinx_zynqmp_zc1751_xm016_dc2_defconfig b/configs/xilinx_zynqmp_zc1751_xm016_dc2_defconfig index af122f7..2811d4b 100644 --- a/configs/xilinx_zynqmp_zc1751_xm016_dc2_defconfig +++ b/configs/xilinx_zynqmp_zc1751_xm016_dc2_defconfig @@ -30,6 +30,8 @@ CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_OF_EMBED=y CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_CLK=y +CONFIG_SPL_CLK=y CONFIG_SYS_I2C_CADENCE=y CONFIG_DM_MMC=y CONFIG_NAND_ARASAN=y diff --git a/configs/xilinx_zynqmp_zc1751_xm019_dc5_defconfig b/configs/xilinx_zynqmp_zc1751_xm019_dc5_defconfig index dcc5dd2..3711084 100644 --- a/configs/xilinx_zynqmp_zc1751_xm019_dc5_defconfig +++ b/configs/xilinx_zynqmp_zc1751_xm019_dc5_defconfig @@ -26,6 +26,8 @@ CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_OF_EMBED=y +CONFIG_CLK=y +CONFIG_SPL_CLK=y CONFIG_SYS_I2C_CADENCE=y CONFIG_DM_MMC=y CONFIG_ZYNQ_SDHCI=y diff --git a/configs/xilinx_zynqmp_zcu102_defconfig b/configs/xilinx_zynqmp_zcu102_defconfig index 1ebadd2..46a5dd0 100644 --- a/configs/xilinx_zynqmp_zcu102_defconfig +++ b/configs/xilinx_zynqmp_zcu102_defconfig @@ -30,6 +30,8 @@ CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_OF_EMBED=y CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_CLK=y +CONFIG_SPL_CLK=y CONFIG_DM_MMC=y CONFIG_ZYNQ_SDHCI=y CONFIG_SPI_FLASH=y diff --git a/configs/xilinx_zynqmp_zcu102_revB_defconfig b/configs/xilinx_zynqmp_zcu102_revB_defconfig index 59e1cf1..96a2be1 100644 --- a/configs/xilinx_zynqmp_zcu102_revB_defconfig +++ b/configs/xilinx_zynqmp_zcu102_revB_defconfig @@ -30,6 +30,8 @@ CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_OF_EMBED=y CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_CLK=y +CONFIG_SPL_CLK=y CONFIG_DM_MMC=y CONFIG_ZYNQ_SDHCI=y CONFIG_SPI_FLASH=y |