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authorJose Miguel Sanchez Sanabria <jsanabria@iseebcn.com>2018-06-28 11:47:17 +0200
committerJose Miguel Sanchez Sanabria <jsanabria@iseebcn.com>2018-06-28 11:47:17 +0200
commit28bc3362064be5ff6108c99c8cf657f19c572ffb (patch)
tree5f3f8d9b6636286f728486ea55515b6dc6ba7cd5
parentd6c556b7335a6459a88329e9cd3058cf5e13db61 (diff)
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IGEP0146: Fixed Unstable MMC BUG: SWUBIMX17-33
Define separated MUX for PAD CLK of USDHC controllers Redefine pullups and DSE resistance of other PADs of USDHC controllers Key point was to reduce the DSE resistance from 80 ohms to 48 ohms and to put CLK line at 100K pulldown Signed-off-by: Jose Miguel Sanchez Sanabria <jsanabria@iseebcn.com>
-rw-r--r--board/isee/igep0146/igep0146.c16
-rw-r--r--configs/igep0146_imx6ul_512M_defconfig10
2 files changed, 15 insertions, 11 deletions
diff --git a/board/isee/igep0146/igep0146.c b/board/isee/igep0146/igep0146.c
index 35c5432..8b4fefd 100644
--- a/board/isee/igep0146/igep0146.c
+++ b/board/isee/igep0146/igep0146.c
@@ -63,9 +63,14 @@ DECLARE_GLOBAL_DATA_PTR;
#define MDIO_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_PUE | \
PAD_CTL_DSE_48ohm | PAD_CTL_SRE_FAST | PAD_CTL_ODE)
-#define USDHC_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
- PAD_CTL_PUS_22K_UP | PAD_CTL_SPEED_LOW | \
- PAD_CTL_DSE_80ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS)
+#define USDHC_PAD_CTRL (PAD_CTL_PUS_47K_UP | \
+ PAD_CTL_SPEED_LOW | PAD_CTL_DSE_48ohm | \
+ PAD_CTL_SRE_FAST | PAD_CTL_HYS | \
+ PAD_CTL_PUE | PAD_CTL_PKE)
+
+#define USDHC_PAD_CLK_CTRL (PAD_CTL_PUS_100K_DOWN | \
+ PAD_CTL_SPEED_LOW | PAD_CTL_DSE_48ohm | \
+ PAD_CTL_SRE_FAST | PAD_CTL_HYS)
#ifdef CONFIG_SYS_I2C_MXC
#define I2C_PAD_CTRL ( PAD_CTL_PUS_22K_UP | PAD_CTL_ODE | PAD_CTL_SPEED_MED | \
@@ -133,7 +138,7 @@ static iomux_v3_cfg_t const enet1_pads[] = {
/* sd 1 */
static iomux_v3_cfg_t const usdhc1_pads[] = {
- MX6_PAD_SD1_CLK__USDHC1_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+ MX6_PAD_SD1_CLK__USDHC1_CLK | MUX_PAD_CTRL(USDHC_PAD_CLK_CTRL),
MX6_PAD_SD1_CMD__USDHC1_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL),
MX6_PAD_SD1_DATA0__USDHC1_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
MX6_PAD_SD1_DATA1__USDHC1_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
@@ -145,8 +150,7 @@ static iomux_v3_cfg_t const usdhc1_pads[] = {
/* emmc */
static iomux_v3_cfg_t const usdhc2_pads[] = {
- MX6_PAD_NAND_ALE__GPIO4_IO10 | MUX_PAD_CTRL(NO_PAD_CTRL),
- MX6_PAD_NAND_RE_B__USDHC2_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+ MX6_PAD_NAND_RE_B__USDHC2_CLK | MUX_PAD_CTRL(USDHC_PAD_CLK_CTRL),
MX6_PAD_NAND_WE_B__USDHC2_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL),
MX6_PAD_NAND_DATA00__USDHC2_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
MX6_PAD_NAND_DATA01__USDHC2_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
diff --git a/configs/igep0146_imx6ul_512M_defconfig b/configs/igep0146_imx6ul_512M_defconfig
index 9df7c91..96915fe 100644
--- a/configs/igep0146_imx6ul_512M_defconfig
+++ b/configs/igep0146_imx6ul_512M_defconfig
@@ -5,20 +5,20 @@ CONFIG_MX6UL=y
CONFIG_TARGET_IGEP0146=y
CONFIG_BOOTDELAY=3
CONFIG_BOARD_EARLY_INIT_F=y
-# CONFIG_CMD_IMLS is not set
-CONFIG_CMD_MEMTEST=y
-# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_GPIO=y
-CONFIG_CMD_CACHE=y
CONFIG_OF_LIBFDT=y
CONFIG_DM=y
CONFIG_DM_THERMAL=y
CONFIG_DISPLAY_BOARDINFO=y
CONFIG_DEFAULT_FDT_FILE="imx6ul-igep-base0040rd102.dtb"
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_CACHE=y
CONFIG_CMD_MMC=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_EXT4=y
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
+CONFIG_CMD_MEMTEST=y
+# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_FLASH is not set