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author | Ye.Li <ye.li@nxp.com> | 2016-10-08 16:58:29 +0800 |
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committer | Stefano Babic <sbabic@denx.de> | 2016-11-16 20:53:55 +0100 |
commit | 27e3a3c7f8a469c61509102a672d210bdff46059 (patch) | |
tree | 90ae3a480c983a57303cf8fec0bfe98bd9e4753e | |
parent | 29e0cfb4f77f7aa369136302cee14a91e22dca71 (diff) | |
download | u-boot-imx-27e3a3c7f8a469c61509102a672d210bdff46059.zip u-boot-imx-27e3a3c7f8a469c61509102a672d210bdff46059.tar.gz u-boot-imx-27e3a3c7f8a469c61509102a672d210bdff46059.tar.bz2 |
imx: mx6sx: Disable ENET clock before switching clock parent
Need to gate ENET clock when switching to a new clock parent, because
the mux is not glitchless.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye.Li <ye.li@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
-rw-r--r-- | arch/arm/cpu/armv7/mx6/clock.c | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv7/mx6/clock.c b/arch/arm/cpu/armv7/mx6/clock.c index ae3143c..96fbd81 100644 --- a/arch/arm/cpu/armv7/mx6/clock.c +++ b/arch/arm/cpu/armv7/mx6/clock.c @@ -881,6 +881,11 @@ int enable_fec_anatop_clock(int fec_id, enum enet_freq freq) writel(reg, &anatop->pll_enet); #ifdef CONFIG_MX6SX + /* Disable enet system clcok before switching clock parent */ + reg = readl(&imx_ccm->CCGR3); + reg &= ~MXC_CCM_CCGR3_ENET_MASK; + writel(reg, &imx_ccm->CCGR3); + /* * Set enet ahb clock to 200MHz * pll2_pfd2_396m-> ENET_PODF-> ENET_AHB |