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authorSiarhei Siamashka <siarhei.siamashka@gmail.com>2016-09-05 06:36:10 +0300
committerTom Rini <trini@konsulko.com>2016-10-06 20:57:36 -0400
commit22a402f00c9de841026105baa219a03d2273c01c (patch)
tree431c4126916c684e00901051e3bc45d467f6e5cc
parent24307d6337e69c277e8f70ae9af97ef331dc39c5 (diff)
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ARM: Respect CONFIG_SPL_STACK define in lowlevel_init.S
The SPL and U-Boot proper may use different initial stack locations, which are configured via CONFIG_SPL_STACK and CONFIG_SYS_INIT_SP_ADDR defines. The lowlevel_init.S code needs to handle this in the same way as crt0.S Without this fix, setting the U-Boot stack location to some place, which is not safely accessible by the SPL (such as the DRAM), causes a very early SPL deadlock. Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
-rw-r--r--arch/arm/cpu/armv7/lowlevel_init.S4
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv7/lowlevel_init.S b/arch/arm/cpu/armv7/lowlevel_init.S
index 1872c57..658934d 100644
--- a/arch/arm/cpu/armv7/lowlevel_init.S
+++ b/arch/arm/cpu/armv7/lowlevel_init.S
@@ -19,7 +19,11 @@ ENTRY(lowlevel_init)
/*
* Setup a temporary stack. Global data is not available yet.
*/
+#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_STACK)
+ ldr sp, =CONFIG_SPL_STACK
+#else
ldr sp, =CONFIG_SYS_INIT_SP_ADDR
+#endif
bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
#ifdef CONFIG_SPL_DM
mov r9, #0