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authorPeng Fan <peng.fan@nxp.com>2016-10-10 10:00:45 +0800
committerYe Li <ye.li@nxp.com>2017-04-05 14:04:37 +0800
commit0ca7dcfbeb290f4dec064d6950872443acd95baf (patch)
treee3ac200b9832202f102072a96042ff3d3587a583
parent0716cc14a3739e9d161f5d0c3a0bebf0272759f9 (diff)
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MLK-13307-7 imx: mx6sll: update soc settings
Update soc settings for i.MX6SLL. Signed-off-by: Peng Fan <peng.fan@nxp.com> (cherry picked from commit afa2d78f2b799337eae3dc67c0ed702d5520eee6)
-rw-r--r--arch/arm/cpu/armv7/mx6/soc.c13
1 files changed, 11 insertions, 2 deletions
diff --git a/arch/arm/cpu/armv7/mx6/soc.c b/arch/arm/cpu/armv7/mx6/soc.c
index 0a97f0d..61b7498 100644
--- a/arch/arm/cpu/armv7/mx6/soc.c
+++ b/arch/arm/cpu/armv7/mx6/soc.c
@@ -234,6 +234,10 @@ static int set_ldo_voltage(enum ldo_reg ldo, u32 mv)
u32 val, step, old, reg = readl(&anatop->reg_core);
u8 shift;
+ /* No LDO_SOC/PU/ARM */
+ if (is_mx6sll())
+ return 0;
+
if (mv < 725)
val = 0x00; /* Power gated off */
else if (mv > 1450)
@@ -293,7 +297,7 @@ static void clear_mmdc_ch_mask(void)
reg = readl(&mxc_ccm->ccdr);
/* Clear MMDC channel mask */
- if (is_mx6sx() || is_mx6ul() || is_mx6ull() || is_mx6sl())
+ if (is_mx6sx() || is_mx6ul() || is_mx6ull() || is_mx6sl() || is_mx6sll())
reg &= ~(MXC_CCM_CCDR_MMDC_CH1_HS_MASK);
else
reg &= ~(MXC_CCM_CCDR_MMDC_CH1_HS_MASK | MXC_CCM_CCDR_MMDC_CH0_HS_MASK);
@@ -344,6 +348,7 @@ static void init_bandgap(void)
}
}
+
#ifdef CONFIG_MX6SL
static void set_preclk_from_osc(void)
{
@@ -643,6 +648,10 @@ uint mmc_get_env_part(struct mmc *mmc)
int board_postclk_init(void)
{
+ /* NO LDO SOC on i.MX6SLL */
+ if (is_mx6sll())
+ return 0;
+
set_ldo_voltage(LDO_SOC, 1175); /* Set VDDSOC to 1.175V */
return 0;
@@ -720,7 +729,7 @@ void s_init(void)
u32 mask528;
u32 reg, periph1, periph2;
- if (is_mx6sx() || is_mx6ul() || is_mx6ull())
+ if (is_mx6sx() || is_mx6ul() || is_mx6ull() || is_mx6sll())
return;
/* Due to hardware limitation, on MX6Q we need to gate/ungate all PFDs