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authorBin Meng <bmeng.cn@gmail.com>2016-05-07 07:46:13 -0700
committerBin Meng <bmeng.cn@gmail.com>2016-05-23 15:18:00 +0800
commit07ac84eaaa5daeae4a56ff70649a3e50fc470db5 (patch)
tree80bfff03301e452966c2c45d5b647efb77c4ea6e
parentdca4d1a2ce920544b8158d7a5d359d41a6d35330 (diff)
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x86: irq: Reserve IRQ9 for ACPI in PIC mode
Reserve IRQ9 which is to be used as SCI interrupt number for ACPI in PIC mode. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Tested-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
-rw-r--r--arch/x86/cpu/irq.c5
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/x86/cpu/irq.c b/arch/x86/cpu/irq.c
index 2950783..7586fc2 100644
--- a/arch/x86/cpu/irq.c
+++ b/arch/x86/cpu/irq.c
@@ -121,6 +121,11 @@ static int create_pirq_routing_table(struct udevice *dev)
priv->irq_mask = fdtdec_get_int(blob, node,
"intel,pirq-mask", PIRQ_BITMAP);
+ if (IS_ENABLED(CONFIG_GENERATE_ACPI_TABLE)) {
+ /* Reserve IRQ9 for SCI */
+ priv->irq_mask &= ~(1 << 9);
+ }
+
if (priv->config == PIRQ_VIA_IBASE) {
int ibase_off;