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author | Jose Miguel Sanchez Sanabria <jsanabria@iseebcn.com> | 2018-02-07 09:44:51 +0100 |
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committer | Jose Miguel Sanchez Sanabria <jsanabria@iseebcn.com> | 2018-02-07 09:44:51 +0100 |
commit | 6cad7314e0de40298938d667d0087b4bb1c33241 (patch) | |
tree | 04e0762934314e7631b8ef8aa4c8040a536b55c8 | |
parent | 745a3ba4500140a8af7320b601d6741af0829251 (diff) | |
download | u-boot-imx-6cad7314e0de40298938d667d0087b4bb1c33241.zip u-boot-imx-6cad7314e0de40298938d667d0087b4bb1c33241.tar.gz u-boot-imx-6cad7314e0de40298938d667d0087b4bb1c33241.tar.bz2 |
Ethernet fixed to 100 Mbps
-rw-r--r-- | arch/arm/cpu/armv7/mx6/Kconfig | 1 | ||||
-rw-r--r-- | board/isee/igep0046/igep0046.c | 82 | ||||
-rw-r--r-- | include/configs/igep0046.h | 10 |
3 files changed, 69 insertions, 24 deletions
diff --git a/arch/arm/cpu/armv7/mx6/Kconfig b/arch/arm/cpu/armv7/mx6/Kconfig index 570c3e5..14d46ff 100644 --- a/arch/arm/cpu/armv7/mx6/Kconfig +++ b/arch/arm/cpu/armv7/mx6/Kconfig @@ -158,7 +158,6 @@ config TARGET_IGEP0046 select DM_THERMAL select BOARD_EARLY_INIT_F select BOARD_LATE_INIT - select MX6DL config TARGET_KOSAGI_NOVENA bool "Kosagi Novena" diff --git a/board/isee/igep0046/igep0046.c b/board/isee/igep0046/igep0046.c index 22e1243..f02c541 100644 --- a/board/isee/igep0046/igep0046.c +++ b/board/isee/igep0046/igep0046.c @@ -354,26 +354,9 @@ int board_phy_config(struct phy_device *phydev) val |= 0x0017; phy_write(phydev, MDIO_DEVAD_NONE, 16, val); phy_write(phydev, MDIO_DEVAD_NONE, 22, 0); - /* - * Page 0 Register 0: Copper Control Register - * Auto-Negotiation Enable R0_0.12: 0 Disable Auto-negotiation Process - * Speed Select (MSB) R0_0.6 to 0: 100 Mbps (01) - * Speed Select (LSB) R0_0.13 to 1: 100 Mbps (01) - * Core Duplex Mode R0_0.8 to 1: Full Duplex - */ - /* - val=0x0000; - val = phy_read(phydev, MDIO_DEVAD_NONE, 0); - val = 0xA100; - phy_write(phydev, MDIO_DEVAD_NONE, 0, val); - phy_write(phydev, MDIO_DEVAD_NONE, 22, 0); - */ } - if (phydev->drv->config) phydev->drv->config(phydev); - /* Software Reset to apply changes */ - //miiphy_reset("FEC", 0); return 0; } @@ -560,11 +543,68 @@ int power_init_board(void) pmic_reg_write(p, PFUZE100_VGEN5VOL, reg); /* Decrease VGEN6 from 3.3 to 2.5V */ - //pmic_reg_read(p, PFUZE100_VGEN6VOL, ®); - //reg &= ~LDO_VOL_MASK; - //reg |= LDOB_2_50V; - //pmic_reg_write(p, PFUZE100_VGEN6VOL, reg); + pmic_reg_read(p, PFUZE100_VGEN6VOL, ®); + reg &= ~LDO_VOL_MASK; + reg |= LDOB_2_50V; + pmic_reg_write(p, PFUZE100_VGEN6VOL, reg); #endif return 0; } #endif + + +#ifdef CONFIG_RESET_PHY_R +void mv_phy_88e1510_init(char *name) +{ + u16 val; + u16 devadr; + + if (miiphy_set_current_dev(name)) + return; + + /* command to read PHY dev address */ + if (miiphy_read(name, 0xEE, 0xEE, (u16 *) &devadr)) { + printf("Err..%s could not read PHY dev address\n", + __FUNCTION__); + return; + } + + /* + * Page 2 Register 24: RGMII Output Impedance Calibration Override + * VDDO Level R24_2.13: 1; 2.5V used + */ + miiphy_write(name, 0, 22, 2); + miiphy_read(name, 0, 24, &val); + val |= 0x2000; + miiphy_write(name, 0, 24, val); + + /* + * Page 0 Register 9: 1000BASE-T Control Register + * 1000BASE-T Full-Duplex R0_9.8: 0 Do not advertise + * 1000BASE-T Half-Duplex R0_9.7: 0 Do not advertise + */ + miiphy_write(name, 0, 22, 0); + miiphy_read(name, 0, 9, &val); + val = 0x0000; + miiphy_write(name, 0, 9, val); + + /* + * Page 0 Register 0: Copper Control Register + * Copper Reset R0_0.15: 1; PHY Software reset + * Auto-Negotiation Enable R0_0.12: 1; Enable Auto-Negotiation Process + */ + miiphy_write(name, 0, 22, 0); + miiphy_read(name, 0, 0, &val); + val |= 0x9000; + miiphy_write(name, 0, 0, val); + miiphy_write(name, 0, 22, 0); + + printf("88E1510 Initialized on %s\n", name); +} + +void reset_phy(void) +{ + /* configure and initialize */ + mv_phy_88e1510_init("FEC"); +} +#endif /* CONFIG_RESET_PHY_R */
\ No newline at end of file diff --git a/include/configs/igep0046.h b/include/configs/igep0046.h index 1c3c872..a8220e9 100644 --- a/include/configs/igep0046.h +++ b/include/configs/igep0046.h @@ -112,6 +112,13 @@ #define CONFIG_PHYLIB #define CONFIG_PHY_MARVELL +#if defined(CONFIG_MX6DL) +#define CONFIG_RESET_PHY_R /* Software Reset of PHY */ +#endif +#if defined(CONFIG_MX6Q) +#undef CONFIG_RESET_PHY_R +#endif + /* Initial ARP Hangs so configure small timeout */ /* USB Configs */ @@ -247,9 +254,8 @@ "netargs=setenv bootargs console=${console},${baudrate} " \ "root=/dev/nfs " \ "ip=dhcp nfsroot=${serverip}:${rootnfs},v3,tcp\0" \ - "netboot=echo Booting from net ... need 22 seconds to complete ethernet autonegotiation; " \ + "netboot=echo Booting from net ...; " \ "run netargs; " \ - "sleep 22; " \ "ping ${serverip}; " \ "if test ${ip_dyn} = yes; then " \ "setenv get_cmd dhcp; " \ |