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author | Simon Glass <sjg@chromium.org> | 2015-07-06 12:54:30 -0600 |
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committer | Simon Glass <sjg@chromium.org> | 2015-07-21 17:39:31 -0600 |
commit | 201c29a2d6fe5d50bc731e51fd758b3ae1e028d6 (patch) | |
tree | 13e5d8681004b4700694f3f92ef9a0f5a51685e5 | |
parent | 5010d98f02d9714f83c507e12ade0c52d214d157 (diff) | |
download | u-boot-imx-201c29a2d6fe5d50bc731e51fd758b3ae1e028d6.zip u-boot-imx-201c29a2d6fe5d50bc731e51fd758b3ae1e028d6.tar.gz u-boot-imx-201c29a2d6fe5d50bc731e51fd758b3ae1e028d6.tar.bz2 |
dm: test: Add a test for the reset uclass
Add tests that confirm that the drivers work as expected, and we can walk
through the available reset types trying to reset the board.
Signed-off-by: Simon Glass <sjg@chromium.org>
-rw-r--r-- | test/dm/Makefile | 1 | ||||
-rw-r--r-- | test/dm/reset.c | 74 |
2 files changed, 75 insertions, 0 deletions
diff --git a/test/dm/Makefile b/test/dm/Makefile index 7947545..d28a22f 100644 --- a/test/dm/Makefile +++ b/test/dm/Makefile @@ -20,6 +20,7 @@ obj-$(CONFIG_DM_ETH) += eth.o obj-$(CONFIG_DM_GPIO) += gpio.o obj-$(CONFIG_DM_I2C) += i2c.o obj-$(CONFIG_DM_PCI) += pci.o +obj-$(CONFIG_RESET) += reset.o obj-$(CONFIG_DM_RTC) += rtc.o obj-$(CONFIG_DM_SPI_FLASH) += sf.o obj-$(CONFIG_DM_SPI) += spi.o diff --git a/test/dm/reset.c b/test/dm/reset.c new file mode 100644 index 0000000..5d53f25 --- /dev/null +++ b/test/dm/reset.c @@ -0,0 +1,74 @@ +/* + * Copyright (C) 2015 Google, Inc + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <dm.h> +#include <reset.h> +#include <asm/state.h> +#include <asm/test.h> +#include <dm/test.h> +#include <test/ut.h> + +/* Test that we can use particular reset devices */ +static int dm_test_reset_base(struct unit_test_state *uts) +{ + struct sandbox_state *state = state_get_current(); + struct udevice *dev; + + /* Device 0 is the platform data device - it should never respond */ + ut_assertok(uclass_get_device(UCLASS_RESET, 0, &dev)); + ut_asserteq(-ENODEV, reset_request(dev, RESET_WARM)); + ut_asserteq(-ENODEV, reset_request(dev, RESET_COLD)); + ut_asserteq(-ENODEV, reset_request(dev, RESET_POWER)); + + /* Device 1 is the warm reset device */ + ut_assertok(uclass_get_device(UCLASS_RESET, 1, &dev)); + ut_asserteq(-EACCES, reset_request(dev, RESET_WARM)); + ut_asserteq(-ENOSYS, reset_request(dev, RESET_COLD)); + ut_asserteq(-ENOSYS, reset_request(dev, RESET_POWER)); + + state->reset_allowed[RESET_WARM] = true; + ut_asserteq(-EINPROGRESS, reset_request(dev, RESET_WARM)); + state->reset_allowed[RESET_WARM] = false; + + /* Device 2 is the cold reset device */ + ut_assertok(uclass_get_device(UCLASS_RESET, 2, &dev)); + ut_asserteq(-ENOSYS, reset_request(dev, RESET_WARM)); + ut_asserteq(-EACCES, reset_request(dev, RESET_COLD)); + state->reset_allowed[RESET_POWER] = false; + ut_asserteq(-EACCES, reset_request(dev, RESET_POWER)); + state->reset_allowed[RESET_POWER] = true; + + return 0; +} +DM_TEST(dm_test_reset_base, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT); + +/* Test that we can walk through the reset devices */ +static int dm_test_reset_walk(struct unit_test_state *uts) +{ + struct sandbox_state *state = state_get_current(); + + /* If we generate a power reset, we will exit sandbox! */ + state->reset_allowed[RESET_POWER] = false; + ut_asserteq(-EACCES, reset_walk(RESET_WARM)); + ut_asserteq(-EACCES, reset_walk(RESET_COLD)); + ut_asserteq(-EACCES, reset_walk(RESET_POWER)); + + /* + * Enable cold reset - this should make cold reset work, plus a warm + * reset should be promoted to cold, since this is the next step + * along. + */ + state->reset_allowed[RESET_COLD] = true; + ut_asserteq(-EINPROGRESS, reset_walk(RESET_WARM)); + ut_asserteq(-EINPROGRESS, reset_walk(RESET_COLD)); + ut_asserteq(-EACCES, reset_walk(RESET_POWER)); + state->reset_allowed[RESET_COLD] = false; + state->reset_allowed[RESET_POWER] = true; + + return 0; +} +DM_TEST(dm_test_reset_walk, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT); |