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author | Peng Fan <van.freenix@gmail.com> | 2016-05-23 18:35:57 +0800 |
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committer | Stefano Babic <sbabic@denx.de> | 2016-05-24 14:59:56 +0200 |
commit | e4d79dcaa41a20dfeba602ce9384af5851268825 (patch) | |
tree | f7aad005dd05a8c4a736a8e2e3d149fc95759af8 | |
parent | 27cd0da41e7c2f10d754efba0d178a5715d12bc2 (diff) | |
download | u-boot-imx-e4d79dcaa41a20dfeba602ce9384af5851268825.zip u-boot-imx-e4d79dcaa41a20dfeba602ce9384af5851268825.tar.gz u-boot-imx-e4d79dcaa41a20dfeba602ce9384af5851268825.tar.bz2 |
imx: mx6: ddr: support i.MX6D/QPlus
Support i.MX6D/QPlus.
Signed-off-by: Peng Fan <van.freenix@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
-rw-r--r-- | arch/arm/cpu/armv7/mx6/ddr.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/cpu/armv7/mx6/ddr.c b/arch/arm/cpu/armv7/mx6/ddr.c index 3cc8666..f151eec 100644 --- a/arch/arm/cpu/armv7/mx6/ddr.c +++ b/arch/arm/cpu/armv7/mx6/ddr.c @@ -1200,7 +1200,7 @@ void mx6_ddr3_cfg(const struct mx6_ddr_sysinfo *sysinfo, mmdc1 = (struct mmdc_p_regs *)MMDC_P1_BASE_ADDR; /* Limit mem_speed for MX6D/MX6Q */ - if (is_mx6dq()) { + if (is_mx6dq() || is_mx6dqp()) { if (mem_speed > 1066) mem_speed = 1066; /* 1066 MT/s */ @@ -1219,7 +1219,7 @@ void mx6_ddr3_cfg(const struct mx6_ddr_sysinfo *sysinfo, * Data rate of 1066 MT/s requires 533 MHz DDR3 clock, but MX6D/Q supports * up to 528 MHz, so reduce the clock to fit chip specs */ - if (is_mx6dq()) { + if (is_mx6dq() || is_mx6dqp()) { if (clock > 528) clock = 528; /* 528 MHz */ } |