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| author | Daniel Gorsulowski <Daniel.Gorsulowski@esd.eu> | 2012-01-25 03:19:49 +0000 |
|---|---|---|
| committer | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2012-02-27 21:19:25 +0100 |
| commit | dd80264d07ad20cb7fe743af83ee332ce93b8c73 (patch) | |
| tree | ebd144cf72e25e9a0521313bfc7c3801440657b4 | |
| parent | 07c80bc232cd5829b6b3ec44898aa21f75264899 (diff) | |
| download | u-boot-imx-dd80264d07ad20cb7fe743af83ee332ce93b8c73.zip u-boot-imx-dd80264d07ad20cb7fe743af83ee332ce93b8c73.tar.gz u-boot-imx-dd80264d07ad20cb7fe743af83ee332ce93b8c73.tar.bz2 | |
at91: modified NAND flash timing on meesc board
Signed-off-by: Daniel Gorsulowski <Daniel.Gorsulowski@esd.eu>
| -rw-r--r-- | board/esd/meesc/meesc.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/board/esd/meesc/meesc.c b/board/esd/meesc/meesc.c index 4882ffc..9dd4375 100644 --- a/board/esd/meesc/meesc.c +++ b/board/esd/meesc/meesc.c @@ -73,20 +73,20 @@ static void meesc_nand_hw_init(void) writel(csa, &matrix->csa[0]); /* Configure SMC CS3 for NAND/SmartMedia */ - writel(AT91_SMC_SETUP_NWE(1) | AT91_SMC_SETUP_NCS_WR(0) | - AT91_SMC_SETUP_NRD(1) | AT91_SMC_SETUP_NCS_RD(0), + writel(AT91_SMC_SETUP_NWE(1) | AT91_SMC_SETUP_NCS_WR(1) | + AT91_SMC_SETUP_NRD(2) | AT91_SMC_SETUP_NCS_RD(2), &smc->cs[3].setup); writel(AT91_SMC_PULSE_NWE(3) | AT91_SMC_PULSE_NCS_WR(3) | AT91_SMC_PULSE_NRD(3) | AT91_SMC_PULSE_NCS_RD(3), &smc->cs[3].pulse); - writel(AT91_SMC_CYCLE_NWE(5) | AT91_SMC_CYCLE_NRD(5), + writel(AT91_SMC_CYCLE_NWE(6) | AT91_SMC_CYCLE_NRD(6), &smc->cs[3].cycle); writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE | AT91_SMC_MODE_EXNW_DISABLE | AT91_SMC_MODE_DBW_8 | - AT91_SMC_MODE_TDF_CYCLE(3), + AT91_SMC_MODE_TDF_CYCLE(12), &smc->cs[3].mode); /* Configure RDY/BSY */ |